Laborationer
If the door to the lab room 4121 is closed you can open the lab room 4118 which has a card reader and go from there to 4121.
Make sure you change your password when you log in the first time!
A few slides on Questasim are here.
A simple example on how to implement a 1-bit adder on FPGA is available here.
Tutorials on Xilinx ISE can be found in S:\Tutorials\
Assignment 1: Sequence Detector, Mind the deadlines! (Test files Sequence)
Assignment 2: Keyboard Controller (Presentation, Lab_Manual, VHDL files)
Assignment 3: ALU (Lab_Manual)
Assignment 4 and 5: Calculator with memory and VGA display. (Lab manual, slides)
UPDATE on PROJECT 5: The area requirement is relaxed to 45% for the square root operations.
NOTE: TO compile unisim and simprim libraries, start the 'Simulation library compilation wizard'. This can be found by clicking start->All programs->Xilinx Design tools -> ISE Design Suite-> ISE Design tools -> 64 bit tools.
Make sure you provide the directory path for the Questasim simulator in the compxlib application. Make sure to select only the required FPGA,(spartan 3, Spartan3E).
Choose to compile only the required libraries and update the modelsim.ini file with the generated one to enable modelsim to access these compiled libraries.
Once the compilation is finished, copy the modelsim.ini file from the compiled directory into your project directory. This file will contain the information on the paths to the unisim, simprim and xilinxlibcore directories.
Start simulation from PN as usual, but if you get errors with simulation tool version mismatch, click on Process-> Process properties in the project navigator(PN).
Choose ignore pre-compiled library warning check.
Choose advanced in the 'Property display level' and select ignore simulator/compiled library version check.