Approved
Hardware Acceleration for RObust Header Compression (ROHC) Algorithm
Mohammed Al-Obaidi (SoC10) and Harshavardhan Kittur (SoC10)
Start
2011-10-31
Presentation
2012-06-15
Location:
Finished:
2012-10-08
Master's thesis:
(Contact supervisor)
Abstract
With the proliferation of 4G/LTE networks, many carriers are embracing the emerging field of mobile Voice over Internet Protocol (VoIP). VoIP data packets are encapsulated in the RTP/UDP/IP stack and transmitted over a 4G/LTE IP-based architecture. The RTP/UDP/IP header size is about 40-60 bytes compared to the size of actual payload data which is only 20 bytes. This creates a need for some kind of header-compression technique for efficient utilization of the bandwidth and network resources to deliver a unit of payload data. The robust header-compression (ROHC) framework is introduced as a solution to this problem. This header-compression method is based on the principle that there is a significant redundancy between the headers of packets belonging to the same stream. By sending the static information of the header fields initially and then continuously sending only the dynamic parts of the headers, the size of the headers can be compressed significantly. The major advantage of ROHC over other header-compression techniques is its robustness. It can tolerate loss and residual errors on the link without losing additional packets or introducing additional errors. The scope of this thesis includes proposing a hardware-assisted solution for this computationally intensive algorithm, which includes optimizing a partitioning of the algorithm into HW/SW components to be run on the Altera Arria II GX FPGA board and a possible future ASIC-based solution. The solution should consider throughput, capacity, latency, power consumption, and flexibility. This project is carried out at Ericsson AB, Linköping, in close collaboration with the Product Development Unit LTE.
Supervisor: Håkan Andersson (Ericsson)
Examiner: Viktor Öwall (EIT)