Approved
Spice Circuit Reduction for Speeding up Simulation and Verification
Menglin Wang (2017) and Cancan Yin (2017)
Start
2018-10-31
Presentation
2019-06-03 13:15
Location:
E:2311
Finished:
2019-06-11
Master's thesis:
Abstract
Supervisor: Erik Larsson (EIT) and Hemanth Prabhu (EIT)
Examiner: Pietro Andreani (EIT)