Kursmaterial
Selected Papers
Polynomial approximation
Milos Ercegovac, Tomas Lang, Jean-Michel Muller and Arnaud Tisserand, Reciprocation, Square root, Inverse Square Root, and some Elementary Functions using Small Multipliers, IEEE Transactions on Computers, Vol. 49, No. 7, July 2000, PDF
A. Tisserand. High-Performance Hardware Operators for Polynomial Evaluation. In Int. J. High Performance Systems Architecture, 2007 PDF
Piecewise approximation
A.S. Noetzel, "An Interpolating Memory Unit for Function Evaluation: Analysis and Design, IEEE Trans. Computers, vol. 38, no. 3, pp. 377-384, Mar. 1989 PDF
N. Takagi. Powering by a table look-up and a multiplication with operand modification. IEEE Transactions on Computers, 47(11):1216-1222, November 1998 PDF
J.A. Pineiro, S.F. Oberman, J.-M. Muller and J.D. Bruguera, High-Speed Functio Approximation using a Minimax Quadratic Interpolator, IEEE Transactions on Computers, Vol. 54 no 3, pages 304-318, March 2005 PDF
Elementary functions
E.M. Schwarz and M. J. Flynn, "Hardware Starting Approximation Method and Its Application to the Square Root Operation," IEEE Trans. on Comp., vol. 45, no. 12, Dec. 1996, 14 pages PDF
K. Johansson, O. Gustafsson, and L. Wanhammar, "Approximation of elementary functions using a weighted sum of bit-products," IEEE Int. Symp. Circuits Syst., Kos Island, Greece, May 21-24, 2006, 4 pages PDF
Erik Hertz and Peter Nilsson, "Parabolic Synthesis Methodology Implemented on the Sine Function", in Proceedings of the 2009 International Symposium on Circuits and Systems (ISCAS'09), Taipei, Taiwan, May 24-27, 2009, 4 pages PDF
Yevgen Voronenko and Markus Püschel, "Multiplierless Multiple Constant Multiplication", Just the best parts of the 39 pages
CORDIC
R. Andraka, "A survey of CORDIC algorithms for FPGAs," Proceedings of the 1998 ACM/SIGDA sixth international symposium on Field programmable gate arrays, Feb. 22-24, 1998, Monterey, CA. pp. 191-200 PDF
Y. Hu, "CORDIC-based VLSI architectures for digital signal pprocessing," IEEE Signal processing Magazine, vol. 9, no. 3, pp. 16-35, July 1992 PDF
K. Kota and J. R. Cavallaro, "Numerical accuracy and hardware tradeoffs for CORDIC arithmetic for special-purpose processors," IEEE Transactions on Computers, 1993 PDF
G.L. Haviland and A.A. Tuszyn- ski, "A Cordic Arithmetic Pro- cessor Chip," IEEE Trans. Com- puters, IEEE, New York, Feb. 1980, pp. 68-79, 12 pages PDF
(A classic paper) Jack E. Volder, The CORDIC trigonometric computing technique, IRE Trans. Electron. Comput., EC-8, 3:330-334, September 1959, 5 pages PDF
Direct Digital Frequency Synthesizers
J.M.P. Langlois and D. Al-Khalili, "Phase to Sinusoid Amplitude Conversion Techniques for Direct Digital Frequency Synthesis," IEE Proceedings on Circuits, Devices and Systems, IEE, 2004 PDF
D. De Caro, E. Nappli, and A.G.M. Strollo, "Direct Digital Frequency Synthesizers with Polynomial Hyperfolding Technique,", IEEE Trans. Circuit & Syst. Part-II, Vol.51, pp 337-344, July 2004, 8 pages PDF
Distributed Arithmetic
S. A. White, "Applications of distributed arithmetic to digital signal processing: A tutorial review," IEEE ASSP Mag., July 1989. PDF
Classical Papers
W. Givens "Computation of Plane Unitary Rotations Transforming a General Matrix to Triangular Form," Journal of the Society for Industrial and Applied Mathematics, Vol. 6, No. 1 (Mar.,1958), pp. 26-50 PDF
Michal J. Flynn, "On Division by Functional Iteration," IEEE Transactopns on Computers, August 1970, 5 pages. PDF
A. D. Booth, "A signed binary multiplication technique," Quarterly Journal of Mechanics and Applied Mathematics, pp. 236-240, June 1951, 5 pages PDF
C.R. Baugh and B.A. Wooley, “A Two's Complement Parallel Array Multiplication Algorithm,” IEEE Trans. Computers, vol. 22, no. 12, pp. 1045-1047, Dec. 1973, 3 pages PDF
O.L. MacSorley, "High-Speed Arithmetic in Binary Computer," Proc. Conf. Institute of Radio Engineers (IRE '61), vol. 49, pp. 67-91, 1961, 25 pages PDF
L. Dadda, “Some Schemes for Parallel Multipliers,”Alta Frequenza, Vol. 34, pp. 349–356, 1965, 8 pages PDF
C.S. Wallace, “A Suggestion for a Fast Multiplier,”IEEE Transactions on Electronic Computers, Vol. EC-13, pp. 14–17, 1964, 4 pages PDF
Abraham Peled and Bede Liu, "A New Hardware Realization of Digital Filters", IEEE Trans. on ASSP, Vol. ASSP-22, No.6, Dec. 1974, First paper on Distributed Arithmetic PDF