ASIC implementation exploration for EfficientNet optimizations

Albin Davidsson () and Filip Fondelius ()

Abstract

In this thesis we will explore the possibilities to optimize an EfficientNet-like implementation for an image segmentation problem (segmentation into only two classes). With a given network (or problem to solve) we will explore different implementation options and try to come up with a strategy to reduce/minimize on-chip power used for the calculations. Both real and simulated use cases will be provided and we will be able to benchmark any HW optimizations against these use cases.