Schedule

All lectures and seminars will be held in E:2311.
All labs will take place in E:2435 (Rödtunga / Blånäbba).

Week 43 (October 24 - 28):

	Monday	Tuesday	Wednesday	Thursday	Friday
8-10
10-12				Lecture 2: Intro to data conversion (II)
13-15
15-17		Lecture 1: Intro to data conversion (I)

Week 44 (October 31 - November 4):

	Monday	Tuesday	Wednesday	Thursday	Friday
8-10
10-12				Lecture 4: Nyquist D/A converters
13-15
15-17		Lecture 3: Nyquist D/A converters

Week 45 (November 7 - 11):

	Monday	Tuesday	Wednesday	Thursday	Friday
8-10			Lab 1a: Sampling and quantization
10-12			Lab 1a: Sampling and quantization	Lecture 6: Nyquist A/D converters
13-15
15-17		Lecture 5: Nyquist A/D converters
18-22	Time: 18.00 Lab seminar (E:2311)		Lab 1b: Sampling and quantization
18-22	Time: 18.00 Lab seminar (E:2311)		Lab 1b: Sampling and quantization

Week 46 (November 14 - 18):

	Monday	Tuesday	Wednesday	Thursday	Friday
8-10			Lab 2a: Circuit modeling with VerilogA
10-12			Lab 2a: Circuit modeling with VerilogA	Lecture 8: Circuits for data converters
13-15
15-17		Lecture 7: Nyquist A/D converters
18-22			Lab 2b: Circuit modeling with VerilogA

Week 47 (November 21 - 25):

	Monday	Tuesday	Wednesday	Thursday	Friday
8-10			Lab 3a: Mixed-signal modeling
10-12			Lab 3a: Mixed-signal modeling	Lecture 10: DS data converters
13-15
15-17		Lecture 9: Circuits for data converters
18-22			Lab 3b: Mixed-signal modeling
18-22			Lab 3b: Mixed-signal modeling

Week 48 (November 28 - December 2):

	Monday	Tuesday	Wednesday	Thursday	Friday
8-10
10-12				Lecture 12: Digital enhancement techniques
13-15
15-17		Lecture 11: DS data converters
18-22

HARD DEADLINE for lab reports: 14 December. Students failing to meet this deadline will not be allowed to take the written examination.

Written examination: Thursday 15 December, 08.00 – 13.00, room Ed:025.
Course book, notes, etc are NOT allowed. Old examinations: Dec07, Dec08, Dec09 (solutions), Aug10 (solutions), Dec10 (solutions)

Electrical and Information Technology