On-chip Memory Power Optimization on Mobile GPU

Zhiyuan Yang ()

Abstract

Presently, to address the increasing demands of users for an enriched mobile gaming experience, the imperative lies in advancing the capabilities of Graphics Processing Units (GPUs) integrated into mobile phones. The efficacy of a pro- ficient mobile GPU extends beyond the mere attainment of superior graphical capabilities, it must also exhibit an ability for achieving remarkably low energy consumption to align with the corresponding usage scenarios. Notably, among the various aspects of energy consumption, memory access holds a pivotal position. The primary focus of this study is exploration of strategies toward the reduction of power associated with GPU tile buffer Random Access Memory (RAM) access. Through a comprehensive examination of diverse tile buffer RAM access patterns and their associated power consumption, this research aims to implement refined memory access methodologies and general data processing algorithms for effective power reduction.