Approved
Implementation of Networks on Chip for Flexible Video Processing Applications
Björn Nilsson (MS) and Harry Duque (MS)
Start
2004-08-02
Presentation
2005-05-20 14:00
Location:
Finished:
2005-05-20
Master's thesis:
(Contact supervisor)
Abstract
<p><p>Highly complex systems on chip (SoC) today are inflexible in the communication interconnect between IP blocks. A network on chip (NoC) could be the solution to make more flexible, reusable and efficient designs and to avoid the communication bottlenecks in bus based systems. These NoCs must offer a great deal of determinism by guaranteeing quality of service for the IP blocks in the design. </p> <p>In this project a NoC developed at Philips Research, which offers automatic generation and verification for guaranteed performance, will be implemented for a video pixel processing application. The goal is to make this television application SoC more flexible and for the first time try the Philips NoC within a real application. </p> <p>The project includes the following tasks: <ol> <li>Analyze the demands of the high-end TV application <li>Select and design a communication network based on the demands <li>Design a simulation model of the ASIC and adapt existing processing block interfaces to the network interfaces <li>Evaluate the network performance on the parameters: area, power dissipation, bandwidth, scalability and flexibility </ol></p> <p>The project will be carried out at IC-lab, part of Philips Consumer Electronics, in close collaboration with Philips Research. </p></p>
Supervisor: Frits Steenhof (Philips IC-Lab) and Lambert Spaanenburg (EIT)
Examiner: