Första sida
Welcome to the digital track of IC Project 1.
The latest updates will be posted on this site.
20160529 The final presentation will be on Friday June 3 rd at 09:00 in E:2311
Please target a presentation time of 7 min. Template
20160516 The next presentation will be on Friday May 20th at 08:15 in E:2311
Please target a presentation time of 5 min and include synthesis results for 65nm and an intial layout. No template will be provides, as we discussed during the last presentation.
20160425 The next presentation will be on Thursday April 28th at 13:00 in E:3139. We will tart at 13 sharp.
20160422 Please indicate your availibilty for the 2nd presentation in the doodle.
The template for the presentation is here.
20160329 The first presentation given by the students will be on Thursday March 31 @13:15 in E:2311.A template for the presentation is here. Presentation time will be 5min. My short presentation at the beginning of the session is here.
20160324 We need to schedule the first presentation, given by the students.
The report needs to be submitted March 14th the latest. Please include AMSDs as taught in the VLSI course. No screen from the shells please. Include the VHDL code in the Appendix, 2 pages on 1 sheet.
20160218 Guidelines for pushing your designs through the flow are available under "Laboratory Lessons"
20160211 The Place and Route lab will take place on Tuesday 12th between 0900-1200 in 2435b (Blåtunga)
20160201 The synthesis lab will take place in 2435b (Blåtunga)
20160128 The synthesis lab will be on February 2nd at 0900
20160125 Instructions on how to access the 130nm technolgy can bed found under "Laboratory Lessons".
The memory models etc is located in $FAR_LIB/assignment_resources. The first milestone is a paper and pencil exercise only. For the project part you will switch to 65 nm.
20160121 The compulsory assignment is uploaded