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VINNOVA Industrial Excellence Center - System Design on Silicon
2008-01-01 -> 2017-12-31
Forskningprojekt
In the following research projects conducted within SoS is listed. More details will shortly be available on separate www-pages.
Reconfigurable Computing
Associate Professor Viktor Öwall
PhD Thomas Lenart, graduated June 2008
PhD Henrik Svensson, graduated October 2008
Chenxin Zhang doing Master’s Thesis student
Description: ASICs are often used for applications that need real-time performance within the budget for physical size and energy dissipation. However, these circuits are quite inflexible as modification requires redesign and refabrication, which is expensive and time consuming. Therefore, reconfigurable architectures that can adapt to the current situation seem like a promising idea. The projects have focused on developing architectures and tools for design of coarse-grained reconfigurable architectures.
Design of an Automated Surveillance System
Associate Professor Viktor Öwall
PhD Hugo Hedberg, graduated April 2008
Status: Not active
Description: System concept, algorithm development and hardware architectures were developed during the project.
Switched Mode RF Transmitters
Professor Henrik Sjöland
PostDoc Ellie Cijvat
Description: With the increasing data-rates and complex modulation schemes of new mobile telephone systems, the power consumption becomes an issue in both handset and base-station transmitters. In this project we aim to use switched mode power amplifiers to obtain high efficiency, and use polar transmitters to handle the complex modulation with sufficient linearity. Power amplifiers with pulse-width modulated signal have been successfully demonstrated, both using GaN and CMOS technology. The efficiency of the amplifiers remains challenging, especially for reduced output power.
All-Digital PLL Frequency Synthesizer
Professor Henrik Sjöland
PostDoc Ping Lu
Description: With the scaling of CMOS technology, digital circuits achieve higher switching speed and at the same time occupy less silicon area. At the same time analog circuits face dynamic range issues due to the reduced supply voltage. We therefore use (almost) only digital circuits in the implementation of the frequency synthesizer. Another benefit is that more advanced algorithms than can be used to faster obtain phase lock. A digitally controlled oscillator has been successfully demonstrated, and a full ADPLL has been sent to fabrication.
Beamforming mm-Wave CMOS transmitters
Professor Henrik Sjöland
PhD student Johan Wernehag, graduation December 12, 2008
Description: The scaling of CMOS technology has enabled the realization of mm wave CMOS circuits. At such high frequencies compact antenna arrays can be built, enabling small beamforming systems, which could be used for communication or radar applications. In this project we investigate beamforming transmitters and building blocks. CMOS circuits operating at up to 60GHz have been successfully demonstrated.
Microwave and mm-Wave CMOS Circuits and Systems
Professor Henrik Sjöland
PhD student Markus Törmänen
Description: CMOS technology provide active devices with excellent high frequency performance, but on-chip passive devices like inductors and baluns both occupy substantial silicon area and would perform better off-chip. In this project 23GHz CMOS microwave link receiver front-ends and oscillators have been successfully demonstrated, where some critical passives have been realized off-chip on a glass carrier. The project has been a part of Medea+ Hi-Mission, where we have been sub-contracted by Ericsson in Mölndal.
High-Performance CT Delta-Sigma Modulators for future Mobile Terminals
Postdoc Martin Andersson
Description: In this project we will continue the cooperation between Ericsson Research in Lund and EIT, focusing on CT Delta-Sigma analog-to-digital converters for 3G, LTE and LTE Advanced. The aim is to increase our knowledge base within the field through analysis and modeling of clock jitter, loop delay, overlead protection and multi-bit quantization. The scientific knowledge shall be verified by the design of ADC circuits in a state-of-the-art CMOS process.
High Performance VCOs
Associate Professor Piero Andreani
Description: Low-phase-noise harmonic VCOs at RF are well-known hard-to-design blocks in transceivers for radio communications. During the last several years, we have investigated the theoretical as well as the practical issues encountered in the projects of VCOs integrated in standard CMOS technologies, providing new insights on the mechanisms behind the generation of phase noise, new approaches to the design of tuning varactors, performance optimization in known oscillator architectures, and proposals of improved architectures. This research, which is still ongoing, has produced a large number of VCO prototypes, with theoretical/experimental results presented at several IEEE conferences, as well as in a large number of journal papers.
Low Leakage Arithmetic and Architectures
Professor Peter Nilsson
Description: The focus for this project is on dynamic and static power consumption at arithmetic and architectural level. The goal for this project is on reducing the static power, more or less without increasing the dynamic power consumption.
Tillbaka
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