Approved
A 90nm Digital Phase-Locked Loop based on a Multi-Delay Coarse-Fine Time to Digital Converter
Ying Wu (2009)
Start
2010-09-01
Presentation
2011-12-19 10:15
Location:
Finished:
2011-12-19
Master's thesis:
Abstract
Supervisor: Ping Lu (EIT)
Examiner: Pietro Andreani (EIT)