Approved
Modeling and Implementation of All Digital PLL Frequency Synthesizer With Less Than 1KHz Frequency Resolution in 90-nm CMOS
Mohammed Abdullah Abdulaziz () and Muhammad Shakir ()
Start
2010-06-15
Presentation
2011-03-18 15:15
Location:
E:2311
Finished:
2011-03-23
Master's thesis:
(Contact supervisor)
Abstract
Supervisor: Ping Lu (EIT)
Examiner: Pietro Andreani (EIT)