Approved
Energy Characterization of RISC processors in the Sub-VT Domain
Muhammad Umair Siddiqui ()
Start
2010-06-15
Presentation
2011-10-13 13:00
Location:
Finished:
2011-10-31
Master's thesis:
Abstract
Devices like medical implants and remote sensors etc, are required to operate with very low energy dissipation for longer battery-life. For such ultra-low energy devices, the sub-threshold design is an essential design technique for reducing the energy dissipation of a circuit. An important aspect of this technique is to model the energy dissipation of each design component (and if possible whole design) in sub-threshold domain. This thesis presents the energy characterization of two 32-bitmicroprocessors, namely LEON-3 and Cortex-M0, in sub-threshold domain. For this study, a high-level energy characterization model was used to analyze the energy dissipation and operating-frequency trends of these two microprocessors. The sub-threshold designing can be combined with other energy saving techniques, like clock-gating, multi-VDD and power gating etc, to further improve the energy efficiency of a design. In this thesis, the sub-threshold analysis is performed with and without clock-gating. The results from energy model show that by using a sub-threshold supply voltage and clock-gating, the energy dissipation of both microprocessors can be reduced to the order of pico joules (pJ). The sub-threshold operation will reduce their clock frequency to almost 50 KHz, but most of the medical implants and remote sensors have relaxed throughput constraints.
Supervisor: Chenxin Zhang (EIT) and Syed Muhammad Yasser Sherazi (EIT)
Examiner: Joachim Rodrigues (EIT)