Approved
VLSI Implementation of a Video Encoder Noise-reduction Pre-filter
Per Edgren (2006)
Start
2010-06-01
Presentation
2010-10-13 13:15
Location:
Finished:
2010-10-28
Master's thesis:
(Contact supervisor)
Abstract
This thesis documents the development of a hardware video noise reduction filter to be used in conjunction with a video encoder. A study of the noise sources in the CMOS active pixel sensor along with some common post-processing steps in image signal processors is followed by a comparison between various denoising methods, both spatial and temporal. Reference implementations of several filters are evaluated with respect to a realistic noise model and their effect on the signal-to-noise ratio versus bitrate statistics in H.264 compressed video streams. A hardware implementation of the best qualified filter is presented and a proof of concept FPGA prototype is used for verification.
Supervisor: Erik Persson (ARM Sweden)
Examiner: Joachim Rodrigues (EIT)