First page
Welcome to Introduction to Structured VLSI Design
2013-10-28 Now the lab access should be fixed. This time, pin code is required.
2013-10-09 Next Monday, we wrap up our course and introduce next step.
2013-10-04 Deadline for the 3rd project is extended to 8th Oct. (5:00PM).
2013-10-04 Invited talks from industry next week:
1. "The invention of the network camera and the VLSI technology behind", Stefan Lundberg (developer of world's first network camera), Axis, Lund, E: 2311, 3:00PM, Monday (7th Oct.)
2. Joaquin Canovas (block designer for digital modem IP´s), Ericsson, Lund, E:A, 9:00AM, Tuesday (8th Oct.)
2013-09-29 "Low Power Digital Circuits Design" lecture starts at 8:30AM next Tuesday (1st Oct.)
2013-09-19 No lecture next Tuesday (24th Sept.)
2013-09-19 For those of you having problems getting the 2nd assignment running on the FPGA board make sure that you emulate the keyboard correctly in the input.txt file, i.e. do not forget to send the break codes after each make code.
2013-09-17 You can use ChipScope (embeded in ISE design suite) to debug your hardware. Check the tutorial document and video under "Links".
2013-09-16 The deadline of the 2nd project is 27th Sept.
2013-09-09 Groups svd1-svd9, use svd01-svd09 as account name intead of svd1-svd9.
2013-09-06 Lab access is ready. login information, username: (your group name)/password:(13Change)
2013-09-05 Lab starts next week. Will inform when the Lab access is avaliable
2013-09-04 Sequences for the 1st assignment are available under Laboratory Lessons
2013-09-02 The manual for lab 1 is available under Laboratory Lessons
2013-09-02 Please find a lab partner sign-up for group A or B
2013-08-16 Please have a look at the course schedule to check the time and room
2013-07-30 Please have a look at the course syllabus