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Lunds Tekniska Högskola | Lunds universitet


VINNOVA Industrial Excellence Center - System Design on Silicon

VINNOVA Industrial Excellence Center - System Design on Silicon

2008-01-01 -> 2017-12-31


The research is divided into nine areas representing crucial areas within wireless communication.



1. High Frequency Electronics 


The high frequency electronics is a truly fundamental part of any radio transceiver and its design is considered of fundamental importance and a deep knowledge is therefore of strategic importance for SoS companies. Not surprisingly, a state-of-the-art know-how build-up in this field is a part of the long-term commitment of SoS. Four projects are run by the SoS research team, consisting of a mix of academic and industrial researchers, these are:

1) Millimeter wave transceivers targeting high data rate wireless systems have gained increased

industrial interest also for cellular applications, and some companies have announced that they think 5G will include millimeter waves. A. Axholt graduated in 2011 on beamforming receivers and is now with Ericsson Modem. Having demonstrated a world record in 60GHz CMOS power amplifier efficiency, M. Törmänen received a VR-grant on highly efficient transmitters. In an ELLIIT project we will combine our millimeter wave circuits with wideband DACs from Linköping University to form a complete transmitter for short-range high data-rate communication systems. A new SoS funded project on beamsteering millimeter wave links started 2012, using state-of-the-art SiGe technology from Infineon. T. Tired, who has a long industrial experience from Ericsson and ST Ericsson, has started as a PhD student.

2) Digitally assisted radio front-ends targeting new mobile phone standards (currently LTE – Release 10, mainly funded by the SSF DARE project. State-of-the-art results, verified by measurements on fabricated circuits, have been achieved on both channel filters and receiver front-ends. An invention on a channel filter with tunable third order non-linearity has been transferred to Ericsson, who has applied for a patent.

3) Ultra low power radio receivers, targeting a total transceiver power consumption of 1mW while operating in the 2.45GHz ISM band with 250kbit/s datarate, an activity funded by the SSF UPD project. A remarkable performance has been demonstrated, and the latest front-end can be used not only in our own system but also for Bluetooth, at a power consumption below 0.5mW, less than 20% of other circuits with similar performance. The most recent circuit is a wake-up receiver with record performance.

4) Low cost RF units for distributed antenna systems, targeting MIMO systems with a large number of antennas fed by optical fibres funded by the SSF Distrant project, and we have recently demonstrated our IF over fiber concept along with customized ICs. As a result the carrier frequency becomes decoupled from the cost of the optical link, and low cost fiber and lasers can be used.


2. Antenna Interfaces


The importance (cost) of antenna interfaces is increasing rapidly, due to the increasing number

of frequency bands and the use of multiple antennas (MIMO). Since antenna interfaces today consist of off-chip components, the cost can be directly measured, and it is increasing rapidly with the

growing number frequency bands and antennas. Being able to put a more cost effective antenna interface would give a huge competitive advantage. In fact, if off-chip filters and duplexers can be eliminated, the entire RF front-end industry would change, moving business from filter and switch manufacturers to chip vendors. Two projects are run by the SoS research team, consisting of a mix of academic and industrial researchers:

1) Wideband efficient power amplifier in CMOS technology with adaptive impedance matching, funded by SoS and ELLIIT. An industrial researcher, Reza Bagger, from Ericsson in Kista is also part of the project since 2011. In order to use antenna interfaces that cover several bands, wideband receivers and transmitters must be realized. Receivers have shown good performance while transmitters are still very narrow-band. Therefore the development of a wide-band PA is well motivated. The group has invented a new wide-band PA with state-of- the-art RF performance over a wide bandwidth which was presented at ESSCIRC and a US patent has been granted on an application filed by ST-Ericsson.

2) Active duplexers, aiming at eliminating passive duplexers from the RF front-end are a long- term project, which if successful will contribute to transforming the complete front-end business. This project has a strong industrial participation from Ericsson and key cooperation partner is Prof. Mike Faulkner at Victoria University, a pioneer in active duplexers. One of Prof. Faulkner’s PhD students, visited SoS and ST-Ericsson April - September 2012, working on implementation of a passive tunable duplex filter. An invention has been transferred to Ericsson, who has applied for a patent.

There is a tight collaboration with Ericsson and both H. Sjöland and M. Törmänen have part time

positions at the company. PhD student J. Lindstrand has access to a working place at ST-Ericsson where he can use the CAD-environment.


3. Frequency Synthesis


Frequency synthesis is one of the indispensable functions in all kinds of radios. The personnel in SoS has a longstanding tradition in the art of Voltage Controlled Oscillator (VCO), with several top designs according to the open literature. P. Andreani, who works part-time at Ericsson Modems, has a long track record in VCO design, while T. Mattsson, senior specialist at Ericsson Modems, can boast a 30-year experience in discrete and integrated VCO design. Some of the VCOs designed in this collaboration have found their way in Ericsson Modems products, and have been described in papers published in top-quality conferences/journals (ISSCC, ESSCIRC, JSSC, etc.). Several recent VCOs have been conceived in a three-way cooperation including L. Fanori, a postdoc funded by the EU FP7 DRAGON and by SoS. The goal of this work is to achieve a substantial power saving while maintaining an excellent performance. As an example, a wide-tuning-range VCO meeting LTE specifications has been demonstrated (ISSCC 2013, JSSC 2013) and a future development will be disclosed in February 2014 at the ISSCC. Two patent applications have been filed by Ericsson Modems.

The VCO is at the heart of the phase-locked loop (PLL) implementing the frequency synthesizer. In the last few years, the so-called Digital PLL (DPLL) has become prevalent not only in research, but also in real products, since it promises to exploit the very best quality of the typical nm CMOS technology, with easy programmability, reconfigurability, and amenability to background calibration during normal operation, making the DPLL superior to its analog counterpart.

Ericsson Modems and Ericsson Research have shown an early interest in DPLLs, which vouches for a very strong partnership and a long-term commitment within SoS. In particular, this research has the good fortune of drawing on the expertise of Magnus Nilsson and Hans Hagberg, senior specialists at Ericsson Modems, which guarantees the industrial relevance of the project, as well as the transfer of relevant commercial results. Current work is on designing a new DPLL based on an improved time‐ to‐digital converter has been disclosed both at ESSCIRC and in JSSC.


4. A/D Converters 


The importance of A/D conversion, bridging the analog and the digital world, is second to none: even in the most aggressive software-defined radio an A/D converter is needed to interface the unavoidably analog antenna signal to the digital engine.

In the field of A/D converters the SoS collaboration has been ongoing for several years and as a consequence, a number of truly relevant results have emerged, which joins PhD students, academic supervisors, and industrial supervisors in a tight web.

The first practically important circuit was a Delta‐Sigma A/D converter designed by a former SoS PhD student, Martin Anderson, under the co-supervision of an Ericsson researcher, L. Sundström. This converter has been incorporated in a radio transceiver designed at ST‐Ericsson (now Ericsson Modems), generating also an outstanding scientific output, with papers at a top conference (ESSCIRC) and in world‐leading journals (IEEE JSSC and IEEE TCAS). This line of research continued with PhD student, Mattias Andersson (also funded by EU FP7 DRAGON), co‐supervised by L. Sundström and Martin Anderson, who will hopefully join Ericsson Research after receiving his PhD. Thus, the often problematic transmission of knowledge to the next PhD generation has taken place in a seamless way. Mattias Andersson has designed a more powerful version of the former A/D converter, addressing the specifications of LTE Advanced (release 10), of the highest relevance to SoS partners. Even more interesting is the subsequent development of the converter into a so-called filtering A/D converter, where the modulator is merged with the channel-select filter, yielding a net power and area saving. These advances have been described in a number of papers published in high-quality conferences/journals (ESSCIRC, A-SSCC, and one invited to JSSC under review) and one patent application by Ericsson Research.


5. Baseband Processing


The digital baseband is a very basic functional block of any wireless communication system, ranging from high throughput data communication and smart sensors for internet-of-things to health care and automotive applications. Those different applications set truly different requirements on implementation strategies and choice of technology but also share common fundamentals. Research and development within this area is seen as of true importance to participating companies and it is a part of the long-term commitment of SoS research. Digital baseband processing has in the last 20 years evolved from a one-band GSM phone into a mobile terminal with numerous frequency bands and standards, e.g. GSM, 3G, LTE, WiFi, DVB-H, Bluetooth, etc. This is a trend that have no tendency to slow down but rather the opposite, requiring extremely efficient processing on platforms that offer flexibility and scalability under low power requirements. During the last years we have also seen that true MIMO systems, a long term research area in SoS, making their way into standards and commercial products. A new concept usually referred to as Massive MIMO is pioneered by Lund University and is in this report listed as a separate project. Introducing new concepts often lead to increased power consumption which is not acceptable and research on power efficient baseband architectures are of crucial interest to keep the competitiveness of the industrial partners. Results are published at key conferences and leading journals (e.g. TCAS-I & II, TVLSI, JSAC, JSSC). During the last decade the group has been involved in several EU projects, i.e. Pacwoman, Magnet and Magnet Beyond, Multibase and most recently MAMMOET starting January 2014.

Some specific achievements are:

1. The ability to demonstrate high throughput, low-complexity, and configurable MIMO systems,

including channel estimators, signal detectors and pre-processing. Detectors using different techniques and antenna/modulation configurations are developed and explored how those can be adapted to a rapidly changing wireless channel, a property in many systems. Articles has been published in key IEEE journals such as TCAS-I, TVLSI, TVT and JSAC and 1 PhD was awarded in 2012. This work is and has been sponsored by SoS but also by several SSF and VR grants.

2. A key component is the Digital Front-End (DFE) which should achieve synchronization, parameter extraction and digital compensation for impairments in the analog front-end. This line of research has been pursued within SoS and EU FP7 Multibase and now also within SSF DARE and Marie Curie ATWC. Close cooperation is ongoing with Ericsson Research and currently one PhD student spends substantial part of his time there to investigate digital cancellation techniques in close cooperation with researchers of the RF front-end.

3. Faster-than-Nyquist signaling is concept first proposed in 1975 but was then long confined to the archives of obscurity. On a theoretical level Professor J. B. Anderson and Associate Professor F. Rusek started this research in the beginning of this millennium and in 2005 an implementation perspective was initiated. The cooperation has led to publications in IEEE TCAS and JSSS as well as a survey article in the Proceedings of the IEEE. The work has led to a project with EUTELSAT regarding satellite communication and interest has been shown concerning future DVB development. A PhD was granted in 2011 and the work will continue on a VR grant (PI V. Öwall).

4. On the extreme low power side a decimation filter chain designed for sub-VT operations is evaluated for throughput, minimum energy dissipation, and a single voltage constrained system has been developed in the SSF UPD project. This makes a strong interaction between the Digital Baseband and Low Power projects.


6. Reconfigurable Computing


The cost of designing integrated circuits in today’s technologies, including the high cost for mask

production, necessitates the prolongation of the life time of designs. At the same time there is a rapid evolution with respect to applications, especially in the area of wireless communication. The evolution of standards and the introduction into new application areas with new demands continuously drives the development of underlying computational platforms with increased complexity or reduced power consumption demands. Additionally, the requirements on time-to- market and non-recurring engineering (NRE) cost force hardware platforms to be updatable to succeeding amendments of standards and new performance demands. Thereby, doing re-spins on dedicated hardware accelerators for each of the standard updates is not affordable. This project is focused on providing reconfigurable platforms to accommodate those challenges to provide computational platforms with extended lifetime.

The developed Coarse Grained Reconfigurable Platform (CGRP) was adopted within the EU FP7 Multibase project as part of a Digital Front-End and has been targeting MIMO processing, e.g. in LTE. The approach is being investigated as a computational platform within the new Massive MIMO project, MAMMOET, with Ericsson and Infineon as partners. These efforts were part of the successful bid for an SSF grant in 2010, HiPEC - High Performance Embedded Computing, together with the Computer Science department as well as Linköping and Halmstad Universities. The cooperation is crucial in attacking the obstacles of the lack of mapping tools for algorithms onto such architectures.

Our belief is that those platforms are a viable alternative for future industrial products while there still are considerable challenges to overcome. The current work on MIMO and Massive MIMO application is sure to advance these technologies.

7. Ultra Low Power Design


Ultra low power design has arisen to one of the major design constraints in battery-operated devices like mobile phones, hearing aids, or wireless body area networks (WBAN). Today ultra-low voltage (ULV) design has become an industry discipline where global players start developing for the mass market. Within SoS we are studying various design aspects of circuits that can operate at an aggressively scaled supply voltage. Other application areas are machine-to-machine interfaces (M2M), e.g. required for massive sensor networks and biomedical applications like hearing aids or brain-machine interfaces (BMI). In the digital ASIC group research is conducted in the areas methodology/infrastructure, memories, as well as ULV circuits. Research is realized by tight collaboration with industrial and academic partners. In methodologies/infrastructure we have successfully implemented a unique ULV design process that allows a seamless integration of full-custom cells into a commercial design environment, supported by Cadence. This process was successfully validated by numerous fabricated ICs through STM. Together with Prof. A. Burg at EPFL we have been working on ULV memories, a fundamental building block. Here, we are able to refer to large number of publications at well- recognized conferences and journals. Currently, we are migrating to the latest technology offered by STM (28nm FD-SOI) through a joint project with Mr. Ciampolini at STM, with a first tape-out scheduled for January 2014. In the area of typical ULV circuits are we having regular meetings with researchers at Ericsson Research in Lund, discussing energy efficient M2Ms. Currently, we are defining a projects with Prof. D. Heo at Washington State University and with Prof. C. Schlegel at Dalhousie University, Canada.

The research findings and infrastructure in this area allows us to target larger ULV systems which facilitate larger projects relevant for SoS partners, e.g. M2Ms.

8. Emerging Technologies


Lund University has a unique position in this field due to early initiatives in the areas of nanotechnology and device implementation in the form of scaled III-V nanowire MOSFETs. The activities related to emerging technologies within the SoS VINNOVA Industrial Center act as a bridge between the basic research efforts, primarily funded by other programs, and the more industrial research effort within this program. For instance, the competence within the SoS center has been used to identify test vehicles for the emerging technology development at Lund University.

With the scaling of the transistor technologies below 20 nm gate length, it is harder to maintain electrostatic control in the transistor channel and major efforts are undertaken to continue the transistor scaling. III-V MOSFETs in trigate/gate-all-around configuration have been introduced into the ITRS roadmap as a high performance/lower power alternative to HP Si logic devices. For beyond CMOS technologies, tunnel FETs are currently being considered for ultra-low power transistors operating at 0.3-0.5V.

Our III-V multi-gate MOSFET research has demonstrated world leading results in terms of drive current and transconductance and high frequency performance. For the TFET research, we are pioneering the usage of broken heterostructures for strong improvement of drive current capability.

For SoS, our contribution is mainly through the academic output. Outside of SoS, we have various colorations with TSMC, IBM, local start-up Acconeer AB and QuNano AB. 

9. Massive MIMO


“Traditional” MIMO has been a research topic within the SoS environment for several years and the challenges there are still substantial. However, during the last years algorithm researchers at EIT have taken part in the pioneering work towards a new multiple antenna schemes, commonly referred to as Massive MIMO, which makes a clean break with current practice through the use of a large excess of service-antennas over active terminals. Extra antennas help by focusing energy into ever-smaller regions of space to bring huge improvements in both spectral and radiated energy efficiency. Other benefits of massive MIMO include the extensive use of inexpensive low-power components, reduced latency and simplification of the media access control (MAC). While massive MIMO might render traditional research problems irrelevant, it uncovers entirely new problems: the challenge of making many low-cost low-precision components that work effectively together, acquisition and synchronization of newly-joined terminals, the exploitation of extra degrees of freedom, reducing internal power consumption to achieve total energy efficiency reductions, and finding new deployment scenarios. The research environment in Lund seems extremely viable to pursue those issues.

The algorithm research at EIT joined forces with a group in Linköping within the Strategic Research Program ELLIIT that lead to several ground breaking results and publications. This pioneering work has also lead to several ongoing research grants including SSF DISTRANT and two from VR. Joining forces between theoretical and implementation research, SoS industrial members Ericsson and Infineon, we were able to acquire a new EU project MAMMOET that scored 15 out of a possible 15 in the evaluation. This project mainly focuses on the infra-structure part of the concept but through SoS the terminal perspective has been substantially strengthened through the strong collaboration with SONY Mobile.