Course Material
Selected Papers
For Lecture 09: Leakage Power Analysis and Reduction for Nanoscale Circuits
For Lecture 13: Minimizing Power Consumption in Digital CMOS Circuits
Other Papers
Suggestions is appreciated, otherwise:
Choose one of these:
Abdollahi: Leakage Current Reduction in CMOS VLSI Circuits by Input Vector Control
Carl, Calhoun: Design Considerations for Ultra-Low Energy Wireless Microsensor Nodes
Farrokh, Fischer: A 90-nm Variable Frequency Clock System for a Power-Managed Itanium Architecture Processor
Breeta, Hanson: Exploring Variability and Performance in a Sub-200-mV Processor
Dimitar, Ishihara: Level Conversion for Dual-Supply Systems
Steffen, Markovic: Power and Area Minimization for Multidimensional Signal Processing
Sathe: Energy-Efficient GHz-Class Charge-Recovery Logic
Wilkerson: Reducing Cache Power with Low-Cost, Multi-bit Error-Correcting Codes
Hemant, Babak: Sizing of Dual-VT Gates for Sub-VT Circuits
or these two
Frustaci: Tapered-VTH CMOS Buffer Design for Improved Energy Efficiency in Deep Nanometer Technology
Narendra: Scaling of Stack Effect and its Application for Leakage Reduction