Schedule
All lectures and seminars will be held in E:2311.
All labs will take place in E:2435 (Rödtunga / Blånäbba).
Due to covid19, all lectures and exercise sessions will be held on Zoom until further notice.
Week 45 (November 2 - November 6):
Monday |
Tuesday |
Wednesday |
Thursday |
Friday |
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8-10 |
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10-12 |
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13-15 |
Lecture 2: Intro to data conversion (I) | ||||
15-17 |
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Week 46 (November 9 - 13):
Monday |
Tuesday |
Wednesday |
Thursday |
Friday |
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8-10 |
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10-12 |
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13-15 |
Lecture 4: Nyquist D/A converters | ||||
15-17 |
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Week 47 (November 16 - 20):
Monday |
Tuesday |
Wednesday |
Thursday |
Friday |
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8-10 |
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10-12 |
Lecture 5: |
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13-15 |
Lecture 6: Nyquist A/D converters |
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15-17 |
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17-18 |
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18-21 |
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Week 48 (November 23- 27):
Monday |
Tuesday |
Wednesday |
Thursday |
Friday |
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8-10 |
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10-12 |
Lecture 7: |
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13-15 |
Lecture 8: |
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15-17 |
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17-21 |
Lab 2: Circuit modeling with VerilogA (material, manual) |
Week 49 (November 30 - December 4):
Monday |
Tuesday |
Wednesday |
Thursday |
Friday |
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8-10 |
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10-12 |
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13-15 |
Lecture 10: DS data converters |
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15-17 |
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17-21 |
Lab 3: Mixed-signal modeling (material, manual) |
Week 50 (December 7 - 11):
Monday |
Tuesday |
Wednesday |
Thursday |
Friday |
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8-10 |
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10-12 |
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13-15 |
Lecture 12: Circuits for data converters |
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15-17 |
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HARD DEADLINE for lab reports: Friday 11 December. Students failing to meet this deadline will not be allowed to take the written examination.
Written examination: Friday 15 January 2021, 8.00 – 13.00, room E:2311.
Written examination: the exam is on Friday, Jan. 15, 08.00-13.00. It will be taken remotely via Zoom (a link will be provided to the students who registered).
Course book, notes, etc are NOT allowed. Old examinations: Dec07, Dec08, Dec09 (solutions), Aug10 (solutions)