Schema
All lectures and exercise sessions will be held in E:2311 except where else is stated.
All labs will take place in E:2435 (Rödtunga / Blånäbba).
Week 45 (November 4 - November 8):
Monday |
Tuesday |
Wednesday |
Thursday |
Friday |
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8-10 |
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10-12 |
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Exercise 1
Problems 1.1, (1.2), 1.15, 1.16, 2.12, 2.17, (2.18), 2.19 |
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13-15 |
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15-17 |
Lecture 1 (E:2517) Introduction & MOS transistor |
Lecture 2 MOS transistor |
Week 46 (November 11 - 15):
Monday |
Tuesday |
Wednesday |
Thursday |
Friday |
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8-10 |
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10-12 |
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Exercise 2
Problems 2.1, 2.2, old exam problems: May2016:P1, Jan2016:P1, Jan2014:P2 |
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13-15 |
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15-17 |
Lecture 3 (E:2517) Technology, layout and passives |
Basic amplifier stages |
Week 47 (November 18 - 22):
Monday |
Tuesday |
Wednesday |
Thursday |
Friday |
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8-10 |
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10-12 |
Exercise 3
Problems 3.4, 3.7, (3.9), 3.14, 3.15, (3.23), 3.25; 4.3, 4.5, 4.10 (100uA Iref only), 4.14, (4.15), (4.17) |
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13-15 |
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15-17 |
Lecture 5 (E:2517) Current mirrors & active loads |
Frequency response of basic stages pp. 353-359, 379-387, (388-395), |
Week 48 (November 25- 29):
Monday |
Tuesday |
Wednesday |
Thursday |
Friday |
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8-10 |
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10-12 |
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13-15 |
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15-17 |
Lecture 7 (E:2517) CAD tools, simulations and layout |
Exercise 4 Problems 7.2 (dominant pole only), 7.5, 7.18, (7.28), 7.29a&b, 7.33, 7.39, (7.42a&b), 7.48 |
Week 49 (December 2 - December 6):
Monday |
Tuesday |
Wednesday |
Thursday |
Friday |
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8-10 |
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10-12 |
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13-15 |
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15-17 |
Lecture 8 (E:2517) Operational amplifiers and frequency compensation |
Exercise 5 Problems 6.1, (6.2), 6.4, 6.5, (6.7), 6.10, (6.11), 6.12, (6.15), 6.18 |
Week 50 (December 9 - 13):
Monday |
Tuesday |
Wednesday |
Thursday |
Friday |
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8-10 |
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10-12 |
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13-15 |
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15-17 |
Lecture 9 (E:2517) Noise |
Exercise 6 Problems 9.2, 9.6, 9.21, 9.25 (W/L9=100/8), (9.31), 11.26 |
Week 51 (December 16- 20):
Monday |
Tuesday |
Wednesday |
Thursday |
Friday |
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8-10 |
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10-12 |
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13-15 |
Exercise 7 Problems 11.24, 11.28, 12.1, 12.9, 12.16, (12.20), 4.28 (Is=5fA), |
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15-17 |
Lecture 10 (E:2517) Differential OP-amps |
Voltage and current references |
HARD DEADLINE for lab reports: Wednesday 18 December.
Written examination: The re-exam of Friday 21 August, 14.00-19.00, is planned to take place on-site in room E:2311.
Course book, 65nm CMOS process data sheet, and calculator ARE ALLOWED.
Comments:
Lectures:
Generally, only CMOS parts in the book are covered.
Pages in brackets are supplementary reading.
Exercises:
The 65nm CMOS Process Data Sheet is to be used for all problems (instead of the data given in chapter 2 in the book).
If MOSFET voltage ranges are given in the problem, please scale these ranges to the technology we use. For example, a supply voltage of 3V is not allowed in our technology, and this should thus be scaled to 1.2V instead.
SPICE simulations are left as an exercise to the student. Problems in brackets () are useful, but should not be prioritized.
(4th Edition Course book: The reading instructions and problem numbers for the 4th edition of the book are found here.)