Master thesis presentation: Runtime Frequency Feedback for Low-Power Management

The thesis was carried out at Minhua Micro with Forest Yu as the industrial supervisor, Baktash Behmanesh as the academic supervisor, and Pietro Andreani as the examiner.

This thesis studies a runtime frequency feedback method for low-power digital systems. Conventional low-power designs usually reserve extra voltage and timing margins to ensure stable chip operation under process, voltage, temperature, and aging variations. However, fixed margins can also lead to unnecessary power consumption. To address this problem, this thesis proposes and implements a Runtime Frequency Feedback system. The system observes the current silicon speed through a VCRO-based frequency sensing path and provides this information to later low-power feedback control logic. The thesis covers behavioral modeling, system design, RTL circuit implementation, and functional verification. The results show that the proposed design can provide a practical hardware basis for sensing runtime timing capability, reducing conservative design margins, and supporting more adaptive low-power management.