----- Synopsys v2007.03 ----- 

Version 2006 and older can be found  here.

Synthesis and Simulation

Synopsys is used to simulate and synthesize the design from a functional description in VHDL.
The design can then be placed and routed by Cadence Silicon Ensemble or Encounter, which
should be better at the smaller geometries.

Before starting the synthesis tools, the technology has to be choosen. Different technologies do
not have the same size, speed, set of available gates, etc. The choise will be represented by va-
rious links, stored in set-up files, to cell-libraries that describe the selected technology. For the
moment these are available


    UMC 0.13u     Faraday Technology Libraries for the
                               United Microelectronics Company 130um process.

    AMIS                 AMI Semiconductor, 0.35um CMOS process.



There is an exstensive set of manuals to be studied for a deeper understanding of the tools. The
predefined command sold  from the window in which the tools were initialized, will launch the reader.