STMicroelectronics 28nm CMOS SOI v2.4

[Sep 2014]

This is the latest version of the design kit for the STM 28nm SOI cmos process.

It is restricted to those who have access to the restricted cluster of machines,
currently - "marconi", "popov", and "motala".

Before the end of the universe it will be possible to use the design kit together with
the digital tools.

Do not use the old version 2.3 anymore.

Notes

Setup procedure

The environment is defined by a setup script which is called by the command

> source /usr/hidden/cmp/soi28v24/setup

The first time this is run, the script will also copy some files that are necessary for proper
function of the design kit. Afterwards the Cadence design tool can be started by

> virtuoso &

Connect new libraries to technology cmos32lp_Tech .

Documentation

There is also an extensive set of maunuals which can be read by a browser which
is started by the command

> unidoc &

Some more can be found in the library $PDKITROOT/doc .

Simulation

Use Launch > ADE L to start the Simulation environment.

Be sure to fill in '$PDKITROOT/DATA/MODELS/SPECTRE/CORNERS/corners.scs' as Model File,
(Setup > Model Libraries), or copy it first if changes are to be made.

Then simulate normally.

Design Rule Check

At Rules fill in the file '$PDKITROOT/DRC/CALIBRE/calibredrc.ctrl' and proceed as usual.

Here is a file listing some errors that are acceptable since they will be fixed by tiling etc.

LVS

For LVS use '$PDKITROOT/LVS/CALIBRE/calibrelvs.ctrl' as the Rule File. Do not forget
to tell LVS to export the schematic netlist.