Chartered Semiconductor

Currently, the design kits from Chartered does not contain any logic gate library for digital designs.


If you have the priviledge to utilize the special caps and pads created by Acreo, the libraries can be
accessed by including the following lines in your loacal cds.lib file.

DEFINE  csm18rf_mod  ~acreo/models/csm18rf_mod
DEFINE  pads  ~acreo/pads/1.4

New Revision 2.01 - Use this one

This is the latest revision of the design kit. Users are recommended to use it. The kit is
initialized and run by the commands below, Cadence v5 will be used. Remove your local
.cdsinit file so that a new one can be copied by the script.

> source  /usr/local-tde/cad2/acreo/chrt018r201/startup

> icfb &


Basic manual in $CHRT_HOME/PDK_docs/chrt18rf_referenceManual.pdf

Design rules and other stuff can be downloaded from Colas for those so permitted.

These old versions does still exist and might be functioning.

0.18u rev 1.9

This revision can be initialized by

> source /usr/local-tde/cad2/acreo/chrt018r19/startup
> icfb &

Afterwards some manuals can be found in the directory '$CHRT_HOME/PDK_docs/'.

New Revision 2.0

Looks like the older ones, initialize and start by

> source  /usr/local-tde/cad2/acreo/chrt018r20/startup  [startup5  will select Cadence v5]

> icfb &


Basic manual in $CHRT_HOME/PDK_docs/chrt18rf_referenceManual.pdf