AI Lund lunch seminar: In-memory computing to solve AI?s energy consumption bottle-neck

Publicerad: 2020-11-02

Title: In-memory computing to solve AI?s energy consumption bottle-neck

When: 5 May at 12.00-13.15

Speaker: Mattias Borg, Dept. of Electrical and Information Technology, LTH , Lund University

Abstract

The bottle-neck for continued development of Machine Learning lies in the escalating energy consumption during model training. Ultimately, this will require new hardware that implements non-von Neumann architectures, enabling computing-in-memory and even online unsupervised learning by brain-inspired methods.

Memristors based on ferroelectric memory elements are a promising route to such hardware. Here I will introduce memristor-based computing-in-memory, it's benefits in terms of energy-efficiency and our research on the ferroelectric devices that can make it reality.

The event is a part of Lund University sustainability week 3-8 May 2021.

Registration

AI Lund lunch seminar: Machine Learning Opportunities and Challenges in the Internet of Things Era

Publicerad: 2020-11-02

Title: Machine Learning Opportunities and Challenges in the Internet of Things (IoT) Era

Speaker: Amir Aminifar, Electrical and Information Technology, Lund University

When: 21 April at 12.00-13.15

Where: Online 

Abstract

Machine-learning techniques have been considered in many application domains, including Internet of Things (IoT) systems. The adoption of machine learning in IoT systems creates several new opportunities, e.g., detection of health abnormalities using wearable devices. However, enabling machine learning in the IoT domain also involves several challenges inherent to these systems. Here, we highlight the key challenges in the adoption of machine-learning techniques in the IoT domain and briefly discuss how to tackle these challenges. 

Biography

Amir Aminifar is currently a WASP Assistant Professor in the Department of Electrical and Information Technology at Lund University, Sweden. He received his Ph.D. degrees from the Swedish National Computer Science Graduate School, Linköping University, Sweden. During 2016-2020, he held a Scientist position in the Institute of Electrical Engineering at the Swiss Federal Institute of Technology (EPFL), Switzerland.

Lic. Thesis Seminar: Integration of Clouds to Industrial Communication Networks

Publicerad: 2020-12-16

Title: Integration of Clouds to Industrial Communication Networks

Presenter: Haorui Peng, Electrical and Information Technology, LTH, Lund University and Wallenberg AI, Autonomous Systems and Software Program (WASP)

Reviewer: Prof. Åke Arvidsson från Kristianstad University

Examiner: Christian Nyberg, Electrical and Information Technology, LTH, Lund University

When: 29 January 2021 at 13.15

Location: Online at the zoom platform. Please register at https://www.lth.se/digitalth/events/register-2021-01-29/ in order to get an access link.

Abstract

Cloud computing, owing to its ubiquitousness, scalability and on-demand ac- cess, has transformed into many traditional sectors, such as telecommunication and manufacturing production. As the Fifth Generation Wireless Specifications (5G) emerges, the demand on ubiquitous and re-configurable computing resources for handling tremendous traffic from omnipresent mobile devices has been put forward. And therein lies the adaption of cloud-native model in service delivery of telecommunication networks. However, it takes phased approaches to successfully transform the traditional Telco infrastructure to a softwarized model, especially for Radio Access Networks (RANs), which, as of now, mostly relies on purpose-built Digital Signal Processors (DSPs) for computing and processing tasks.

On the other hand, Industry 4.0 is leading the digital transformation in manufacturing sectors, wherein the industrial networks is evolving towards wireless connectivity and the automation process managements are shifting to clouds. However, such integration may introduce unwanted disturbances to critical industrial automation processes. This leads to challenges to guaran- tee the performance of critical applications under the integration of different systems.

In the work presented in this thesis, we mainly explore the feasibility of inte- grating wireless communication, industrial networks and cloud computing. We have mainly investigated the delay-inhibited challenges and the performance impacts of using cloud-native models for critical applications. We design a solution, targeting at diminishing the performance degradation caused by the integration of cloud computing.

PhD defence: Some Notes on Post-Quantum Cryptanalysis (Erik Mårtensson)

Publicerad: 2020-09-28

Thesis title: Some Notes on Post-Quantum Cryptanalysis

Author: Erik Mårtensson, Department of Electrical and Information Technology, Lund University

Opponent: Prof. Alexander May, Ruhr-Universität Bochum, Germany

When: 22 January 2021 at 9.15

Location: Online at the zoom platform - access by registration

The thesis for download (PDF, 4,7 MB)

Abstract

Cryptography as it is used today relies on a foundational level on the assumption that either the Integer Factoring Problem (IFP) or the Discrete  Logarithm Problem (DLP) is computationally intractable. In the 1990s Peter Shor developed a quantum algorithm that solves both problems in polynomial time. Since then alternative foundational mathematical problems to replace IFP and DLP have been suggested. This area of research is called post-quantum cryptology.

To remedy the threat of quantum computers the National Institute of Standards and Technology (NIST) has organized a competition to develop schemes for post-quantum encryption and digital signatures. For both categories latticebased cryptography candidates  dominate. The second most promising type of candidate for encryption is code-based cryptography.

The lattice-based candidates are based on the difficulty of either the Learning With Errors problem (LWE) or the Nth Degree Truncated Polynomial problem (NTRU), of which LWE is the focus of this thesis. The difficulty of both these
problems in turn relies on the difficulty of variations of the Shortest Vector Problem (SVP). Code-based cryptography is based on the difficulty of decoding random linear codes.

The main focus of this thesis is on solving the LWE problem using the Blum-Kalai-Wasserman algorithm (BKW).We have the following improvements of the algorithm.

1. We combined BKW with state-of-the-art lattice sieving methods to improve the complexity of the algorithm. We also elaborate on the similarities and differences between BKW and lattice sieving, two approaches that on a shallow level look very different.
2. We developed a new binary approach for the distinguishing phase of the BKW algorithm and showed that it performs favorably compared to previous distinguishers.
3. We investigated the Fast Fourier Transform (FFT) approach for the distinguishing part of BKW showing that it performs better than theory predicts and identically with the optimal distinguisher. We showed that we could improve its performance by limiting the number of hypotheses being tested.
4. We introduced practical improvements of the algorithm such as nonintegral step sizes, a file-based sample storage solution and an implementation of the algorithm.

We also improved the classical state-of-the-art approaches for k-sieving - lattice sieving where k vectors are combined at a time - by using quantum algorithms. At the cost of a small increase in time complexity we managed to drastically decrease the space requirement compared to the state-of-the-art quantum algorithm for solving the SVP.

Finally, we developed an algorithm for decoding linear codes where the noise is Gaussian instead of binary. We showed how code-based schemes with Gaussian noise are easily broken. We also found other applications for the algorithm in side-channel attacks and in coding theory.

Registration

Please register at https://www.lth.se/digitalth/events/register-2021-01-22-9-15 inorder to get an access link for the zoom platform.

PhD defence: High-Speed Analog-to-Digital Converters in CMOS

Publicerad: 2020-09-28

Author: Siyu Tan, Department of Electrical and Information Technology, LTH, Lund University

Faculty opponent: Prof. Piero Malcovati from the University of Pavia, Italy

Supervisor: Pietro Andreani, Department of Electrical and Information Technology, LTH, Lund University

Location: Online - link by registration

Registration

Please register at https://www.lth.se/digitalth/events/register-2020-12-18/ in order to get an access link to the online meeting.

The thesis for download [PDF] 

Abstract

The Analog to Digital (A/D) Converters (ADC) are vital components in high-performance radio devices. In the receiver end, the signal received by the analog front-end can not be directly analyzed by the digital core, thus requiring high-performance ADC circuits acting as bridges connecting the analog and digital domain. These circuits are integrated into Complementary Metal-Oxide-Semiconductor (CMOS) chips, which achieve high performance and consume low power at the same time.

In this research, various types of ADCs are analyzed both in architectural designs and component-level implementations. The goal is to find out optimized circuit designs to be used in high-speed communication devices in the future.

Two Successive-Approximation-Register (SAR) ADCs are studied. One of the SAR ADCs is a previously designed synchronous SAR ADC CMOS chip, implemented in the 22nm Fully Depleted Silicon On Insulator (FD-SOI) CMOS, whose measurement results are shown. An estimation and calibration technique for linearizing its Digital to Analog Converter (DAC) imbalance is presented.

Another SAR ADC is improved from the synchronous version, which has asynchronously clocked internal components, designed and implemented in 22nm FD-SOI. Two Continuous-Time (CT) ?? ADCs were designed and analyzed. One of the ?? ADCs is a high-speed converter implemented in 28nm FD-SOI CMOS, running at 5GHz sampling frequency and targeting at 250MHz signal bandwidth. Another ?? ADC is implemented in 65 nm CMOS and fabricated. It evaluates the effectiveness of digital calibration techniques in linearizing a critical outer-most DAC in the feedback.

All the ADC designs showing in this work are closely related to the state-of-the-art research works. The design specifications from the industry field are also carefully considered during the design phase. The introductions and the design details are explained in the first part of this dissertation, and the relevant research papers are attached in the second part.

PhD defence: Content and Resource Management in Edge Networks

Publicerad: 2020-09-28

Author: Mohammadhassan Safavi

Faculty Opponent: Professor Paolo Bellavista, University of Bologna Italy.

Zoom-link: https://lu-se.zoom.us/j/67622578478

Abstract: In this thesis, we investigate and develop new methods for efficient and functional use of resources in edge networks. Setting this work aside from previous work, we study User Generated Content (UGC) such as social media information and data generated in the new emerging Internet of Things systems. We present efficient solutions for placing such content and managing which network resources should be used to make the edge networks effective. By effective we for example mean; using little energy, processing data with short delay or carrying out their tasks with little load on the network. In order to achieve this, we have used a range of optimization and control theoretic tools and studied different aspects of content and resource management in operator managed content distribution networks (CDN). The main parts of the contributions of the thesis can be summarized as follows:

First, we have studied end-to-end energy usage in video delivery systems. We studied the energy usage of a sample video considering separate delivery components and created a model for overall energy usage when delivering video over the Internet. The study comprises experimental and simulated measurements of encoding with different qualities, transmissions over core and wireless access networks and decoding in user devices. We showed how video popularity affects end-to-end energy usage by codec selection.

Second, we proposed optimal and on-line placement algorithms for content placement at the edge. We focused on UGC, considering its distributed bottom-up trajectory pattern. ISP-managed CDNs are considered to be suitable caching hosts of popular UGCs. Furthermore, we proposed on-line learning algorithms to enable decision agents at the edge to predict content popularity from users' social activities.

Third, we took the data center viewpoint of a delivery system. We designed scheduling and request assignment algorithms with an energy usage objective. We showed that an energy-efficient dynamic server provisioning (DSP)-based assignment may lead to an unstable system if sufficient care has not be taken. We then investigated ways of keeping the servers stable, energy efficient and performing load balancing to provide better quality of service (QoS) for end users.

Fourth, we expanded the idea of edge placement in an IoT service offloading context. We investigated the service placement problem in a distributed 5G F-RAN (fog radio access network) architecture with an existing centralized cloud. We proposed optimal and reinforcement learning based algorithms to perform joint service scheduling and placement in fog-cloud hosts based on a utilization objective. We showed that the learning algorithm converges to an optimal policy when there are uncertainties in positioning and service demand parameters.

AI, digitalisering och integritet ? vad får vi för vår hälsodata?

Publicerad: 2020-09-13

Arrangemanget är kostnadsfritt och öppet för alla intresserade. Vi räknar med att kunna ta emot ca 40 deltagare på plats i Nedre Palaestra i Lund. Men man kommer också att kunna delta interaktivt via zoom och följa arrangemanget strömmat över Yotube. 

Föranmälan

• Vi har nu slutat att ta emot anmälningar för att del ta fysiskt på plats i Nedre Palaestra.
• Vill du delta interaktivt online via zoom-plattformen kan du anmäla dig här: http://ai.lu.se/events/registration-2020-10-12/ får du en anslutningslänk.
• Vill du följa arrangemanget via Youtube är du välkommen till ai.lu.se/tv/.

Talat språk: Både svenska och engelska. Man kan ställa frågor på båda språken

Moderator: Johan Wester, Skånemotor

Chatmoderator: Sonja Aits, Lunds universitets cancercentrum, eSSENCE

I programmet

• Paul Franks, Genetisk och molekylär epidemiologi och Covid Symptom Study
• Jonas Ledendal, Handelsrätt
• Elena Pagnin, Elektro- och informationsteknik
• Stefan Larsson, Teknik och samhälle
• Helena Linge, Kliniska Vetenskaper Lund, Avd Pediatrik. CiCADA Health
• Johan Linåker, Datavetenskap
• Mattias Ohlsson, Teoretisk fysik

Bakgrund

Företag som Facebook och Google, och stater som Kina för den delen, använder AI-tekniker och insamlad data på ett sätt som påverkar vår konsumtion och våra politiska åsikter. Men ofta tänker vi inte ens på det. För de flesta spelar det exempelvis inte så stor roll att Spotify vet vilka låtar vi lyssnar på. I Europa finns GDPR och andra instrument för att försöka reglera området, och internetjättarna backar en aning i ljuset av lagstiftning, böter och skandaler som Cambridge Analytica.
 
Men hur förändras vår syn på AI-driven övervakning och vår förhållning till integritetsfrågor i en situation som Coronapandemin? Hälsofrågor och samhällskriser berör oss på ett djupare plan än vad musiksmak gör. Vad gäller vår hälsa vill vi ibland inte berätta för vår familj och våra vänner hur vi mår, inte heller för vår arbetsgivare eller vårt försäkringsbolag för den delen. Ändå laddar nu miljontals medborgare, av rädsla för smittan eller som en akt av solidaritet, ned olika smittspårnings- eller hälso-appar och, utan några problem, delar med sig av sin dagsform.
 
Så man kan ju fråga om vi har kvar någon integritet? Eller får vi tillräcklig kompensation i form av bra vård för den integritet vi ger upp?
 
Låt oss borra lite i vad man kan få ut av hälsodata. På plats har vi forskare från Lunds universitet som ger intressanta, aktuella och rent av futuristiska perspektiv på området.

Organisation & kontakt

Jonas Wisbrant
Stefan Larsson

Evenemanget är en del av Framtidsveckan vid Lunds universitet.

Coronainformation

I dessa tider värnar vi speciellt om alla deltagares säkerhet och hälsa och Framtidsveckan följer Folkhälsomyndighetens och regeringens beslut och rekommendationer. Det betyder att det är begränsat platsantal för evenemang som genomförs i fysiskt format. Lokaler och logistik inför och efter evenemang är också anpassat så att möjlighet till avstånd kan erbjudas. Vi uppmanar alla som känner minsta symptom på förkylning eller annan sjukdom att stanna hemma!

Lund Connected Systems (on-line) Workshop 2020

Publicerad: 2020-09-11

Recordings

View recordings from the workshop at lth.se.

When

• 10 September at 13.00 - 16.00
• 11 September at 9.00 - 12.00

Where: Online on the zoom platform (access link by registration)

Thursday 10 September 

13:00 - 13:30 Introduction and welcome 

13:30 - 13:40 Break 

13:40 - 14:40 Analog and digital circuits 

Arturo Prieto: Standard Cells with 3D Sequential Integration Technology for Multiply-Accumulate Operations

Siyu Tan: A Method to Minimize the Impact of Bit Conversion Errors in SAR ADCs 

Baktash Behmanesh: Wide-band millimeter wave power amplifier design 

14:40 - 15:00 Break 

15:00 - 16:00 Wireless systems ? theory and implementation 

Mohammadhassan Safavi: Joint Fog Service Placement and Scheduling for 5G-Enabled IoT, a QLearning Approach

Jesús Rodríguez Sánchez: Distributed and Scalable Uplink Processing for LIS: Algorithm, Architecture, and Design Trade-offs

Juan Vidal Alegria: The WAX decomposition for distributed MIMO processing

Friday 11 September 

09:00 - 10:00 Wireless testbeds and measurements 

MinKeun Chung: Real-Time Millimeter-Wave Massive MIMO Testbed

Erik Bengtsson: High-resolution mm-wave Radio Channel Characterization 

Sara Gunnarsson: Channel Hardening in Massive MIMO: Model Parameters and Experimental Assessment

10:00 - 10:20 Break 

10:20 - 11:20 Networking, Security and Services 

Russell Whiton: Cellular Opportunistic Positioning for Vehicles 

William Tärneberg: Control over the Cloud for Industry 4.0

Christian Gehrmann: Digital Twin as Security Enabler in Industrial Control Systems 

11:20 - 11:30 Break 

11:30 - 12:00 Future of Connected Systems 

12:00 Closing 

Organisation

The workshop is organised by the Lund University Center for Connected Systems through Ove Edfors, Director and Joachim Rodrigues Co-director

2020 Lund Connected Systems (on-line) Workshop

Publicerad: 2020-07-03

The traditional  Lund University Center for Connected Systems workshop in Lund, planned for September 10-11 2020, has been postponed until the COVID situation improves. In place of this workshop we will hold a shorter on-line workshop, on the same dates, with presentations of research activities in the general area of Connected Systems at the Department of Electrical and Information Technology.

When

• 10 September at 13.00 - 16.00
• 11 September at 9.00 - 12.00

Where: Online on the zoom platform (access link by registration)

Thursday 10 September 

13:00 - 13:30 Introduction and welcome 

13:30 - 13:40 Break 

13:40 - 14:40 Analog and digital circuits 

Arturo Prieto: Standard Cells with 3D Sequential Integration Technology for Multiply-Accumulate Operations

Siyu Tan: A Method to Minimize the Impact of Bit Conversion Errors in SAR ADCs 

Baktash Behmanesh: Wide-band millimeter wave power amplifier design 

14:40 - 15:00 Break 

15:00 - 16:00 Wireless systems ? theory and implementation 

Mohammadhassan Safavi: Joint Fog Service Placement and Scheduling for 5G-Enabled IoT, a QLearning Approach

Jesús Rodríguez Sánchez: Distributed and Scalable Uplink Processing for LIS: Algorithm, Architecture, and Design Trade-offs

Juan Vidal Alegria: The WAX decomposition for distributed MIMO processing

Friday 11 September 

09:00 - 10:00 Wireless testbeds and measurements 

MinKeun Chung: Real-Time Millimeter-Wave Massive MIMO Testbed

Harsh Tataria: High-resolution mm-wave Radio Channel Characterization 

Sara Gunnarsson: Channel Hardening in Massive MIMO: Model Parameters and Experimental Assessment

10:00 - 10:20 Break 

10:20 - 11:20 Networking, Security and Services 

Russell Whiton: Cellular Opportunistic Positioning for Vehicles 

William Tärneberg: Control over the Cloud for Industry 4.0

Christian Gehrmann: Digital Twin as Security Enabler in Industrial Control Systems 

11:20 - 11:30 Break 

11:30 - 12:00 Future of Connected Systems 

12:00 Closing 

Registration

The workshop is free of charge! Welcome register at http://www.lth.se/digitalth/events/register-connected-systems-20-09-10-11/ in order to get an access link.

Organisation

The workshop is organised by the Lund University Center for Connected Systems through Ove Edfors, Director and Joachim Rodrigues Co-director

PhD Defence: Test Cost Reduction of 3D Stacked ICs (Breeta Sengupta)

Publicerad: 2020-08-17

Date: 2020-09-04 at 9:00

Location: E:1408, building E, John Ericssons väg 2, Lund.  / Zoom: https://lu-se.zoom.us/j/66036051217

Oponent: Prof. Adit Singh, Aburn University, USA

Abstract: Ever higher levels of integration within the Integrated Circuit (IC) to meet progressively widening scope of its application in respect of functionality,
size, performance and manufacturing issues inspired development of the three-dimensional (3D) Stacked IC as a device having viable architecture. However, with increased complexity, manufacturing cost increased. The manufacturing cost includes the test cost component, essential to ensure fidelity to the desired design specifications. Of the several challenges faced by 3D Stacked ICs, cost efficient testing of the manufactured product is most critical. Reduction of test cost for 3D Stacked ICs through test planning along with test flow selection methods is addressed in this thesis.

Test planning for 3D Stacked ICs is performed by reducing the total cost accounting for the test time and Design-for-Test (DfT) hardware. Three test architecture standards are used: Built-In Self-Test (BIST), IEEE 1149.1 and IEEE 1500. The test cost corresponding to each test architecture is detailed and test planning algorithms are proposed. The algorithms are implemented and experiments are performed on several 3D Stacked IC designs formed with multiple 2D IC benchmarks. For experiment, a test flow is presented that comprises the wafer test of each chip followed by test of the entire packaged IC. Results indicate effectiveness of the proposed algorithms in terms of test cost. Test flow selection, to decide stages at which tests are to be performed, for 3D Stacked ICs is addressed motivated towards the reduction of test time required to produce each single fault-free package. A model to calculate the total test time for any given test flow is detailed. An algorithm is proposed to find a test flow for reducing test time. The algorithm is implemented and executed on several 3D Stacked IC designs with up to ten chips in the stack. Results indicate considerable reductions in test time as compared to predetermined test flows.

Economic optimization of the operation of energy production and district heating networks.

Publicerad: 2020-06-04

Speaker:

Description

PLDI 2020 Tutorial: Design Space Exploration - also broadcasted on Youtube

Publicerad: 2020-05-14

When: 15 June at 17.00 to 21.00 (8.00-12.00 PDT)

The registration is closed. Due to  +1000 registrations the event will also be broadcasted at Youtube: https://youtu.be/0S-y7uCY93Q

Participants can ask questions on the Slack channel at the PLDI2020 Slack https://pldi20.sigplan.org/slackinvite

Real-world engineering problems commonly have multiple objectives that have to be tuned simultaneously. The trade-off Pareto front resulting from the tuning is used as a decision-making tool for selecting the best trade-off for any specific user scenario. Specifically, multi-objective optimization is a crucial matter in programming languages, compilers and hardware design space exploration (DSE) because real-world applications often rely on a trade-off between several objectives such as throughput, latency, memory usage, energy, area, etc. ?

While the growing demand for sophisticated DSE methods has triggered the development of a wide range of approaches and frameworks, none to date are featured enough to fully address the complexities of DSE in the PL/compilers domain. To address this problem, we introduce a new methodology and a framework dubbed HyperMapper. HyperMapper is a machine learning-based tool designed for the computer systems community and can handle design spaces consisting of multiple objectives and numerical/discrete variables. Emphasis is on exploiting user prior knowledge via modeling of the design space parameters distributions. Given the years of hand-tuning experience in optimizing hardware, designers bear a high level of confidence. HyperMapper gives means to inject knowledge in the search algorithm. The framework uses a Bayesian Optimization algorithm, i.e., construct and utilize a surrogate model of the latent function to guide the search process. A key advantage of having a model is the reduction of the optimization time budget. HyperMapper is a plug-and-play framework that makes it easy for compiler/hardware designers to explore their search spaces.

To aid the comparison of HyperMapper with other DSE tools, we provide a taxonomy of existing tools.

Programme details at: https://pldi20.sigplan.org/details/pldi-2020-tutorials/1/Design-Space-Ex...

Contact; Luigi Nardi WASP-AI assistant professor, Computer Science, Lund University. Follow: https://twitter.com/luiginardi  

To participate is free of charge. 

The tutorial is part of the Programming Language Design and Implementation (PLDI) Online conference 15-20 June

PhD Defence: Electrical Characterisation of III-V Nanowire MOSFETs (Markus Hellenbrand)

Publicerad: 2020-05-26

Titel: III-V Nanowires for High-Speed Electronics

Author: Markus Hellenbrand, Department of Electrical and Information Technology

Faculty opponent: Professor Tibor Grasser, TU Wienna

When: 12 June at 9:15

Location:  E:1406, E-building, Ole Römers väg 3, LTH, Lund University / Zoom: https://lu-se.zoom.us/j/64523497259 

Link to: interview with Markus Hellenbrand: In support of current control by quantum-mechanical tunnelling

Thesis abstract: The ever increasing demand for faster and more energy-efficient electrical computation and communication presents severe challenges for the semiconductor industry and particularly for the metal-oxidesemiconductor field-effect transistor (MOSFET), which is the workhorse of modern electronics. III-V materials exhibit higher carrier mobilities than the most commonly used MOSFET material Si so that the realisation of III-V MOSFETs can enable higher operation speeds and lower drive voltages than that which is possible in Si electronics. A lowering of the transistor drive voltage can be further facilitated by employing gate-all-around nanowire geometries or novel operation principles. However, III-V materials bring about their own challenges related to material quality and to the quality of the gate oxide on top of a III-V MOSFET channel.

This thesis presents detailed electrical characterisations of two types of (vertical) III-V nanowire transistors: MOSFETs based on conventional thermionic emission; and Tunnel FETs, which utilise quantum-mechanical tunnelling instead to control the device current and reach inverse subthreshold slopes below the thermal limit of 60 mV/decade. Transistor characterisations span over fourteen orders of magnitude in frequency/time constants and temperatures from 11 K to 370 K.

The first part of the thesis focusses on the characterisation of electrically active material defects (?traps?) related to the gate stack. Low-frequency noise measurements yielded border trap densities of 10^18 to 10^20 cm^-3 eV^-1 and hysteresis measurements yielded effective trap densities ? projected to the oxide/semiconductor interface ? of 2x10^12 to 3x10^13 cm^-2 eV^-1. Random telegraph noise measurements revealed that individual oxide traps can locally shift the channel energy bands by a few millielectronvolts and that such defects can be located at energies from inside the semiconductor band gap all the way into the conduction band.

Small-signal radio frequency (RF) measurements revealed that parts of the wide oxide trap distribution can still interact with carriers in the MOSFET channel at gigahertz frequencies. This causes frequency hystereses in the small-signal transconductance and capacitances and can decrease the RF gains by a few decibels. A comprehensive small-signal model was developed, which takes into account these dispersions, and the model was applied to guide improvements of the physical structure of vertical RF MOSFETs. This resulted in values for the cutoff frequency fT and the maximum oscillation frequency fmax of about 150 GHz in vertical III-V nanowire MOSFETs.

Bias temperature instability measurements and the integration of (lateral) III-V nanowire MOSFETs in a back end of line process were carried out as complements to the main focus of this thesis. The results of this thesis provide a broad perspective of the properties of gate oxide traps and of the RF performance of III-V nanowire transistors and can act as guidelines for further improvement and finally the integration of III-V nanowire MOSFETs in circuits.

Thesis for download

Lic. Thesis Seminar: On Lightweight Security for Constrained Environments (Jonathan Sönnerup)

Publicerad: 2020-05-15

Topic: On Lightweight Security for Constrained Environments

Presenter: Jonathan Sönnerup, Networks and Security, Department of Electrical and Information Technology at Lund University

When; 10 june at 13.15

Online location: https://lu-se.zoom.us/j/64369594441

Physical location: E:1406, E-building, Ole Römers väg 3, LTH, Lund University

Reviewer:  Dr. Håkan Englund, Ericsson

Abstract: The market of connected devices, IoT devices in particular, is hotter than ever. Today, lightweight IoT devices are used in several sectors, such as smart cities, smart homes, healthcare, and the manufacturing industry. IoT solutions help increase productivity by predictive maintenance and resource management in the industry. Devices with voice interfaces are spreading rapidly in the home automation markets. Hospitals utilize these ``smart'' devices to monitor patients and present diagnostics data, aiding physicians in their work.

It is safe to say that we will be surrounded with more and more connected devices. This opens up to potential attacks, where adversaries may try to disrupt critical services or steal sensitive information. To combat this, data needs to be secured in different ways. This dissertation presents cryptographic algorithms and their performance in lightweight constrained devices.

First, a new lightweight cryptographic algorithm, Grain-128AEAD, is presented. Grain-128AEAD is a stream cipher designed to be implemented in hardware at a low cost while still being fast. The new design improves on earlier versions by making previous attacks more difficult.

Next, Grain-128AEAD is implemented in hardware using multiple optimization techniques to fit different criteria. Trade-offs between throughput, power, and area are evaluated to analyze the suitability for both constrained devices but also for server back-ends.

Finally, the overhead when adding confidentiality and authenticity for communication in an IoT device is evaluated. Here, modern lightweight protocols are utilized in multiple use-cases to give an overview of the overhead in terms of bytes, time, and energy.

Online presentation: From dimensional scaling to system-technology co-optimization

Publicerad: 2020-06-04

Title: From dimensional scaling to system-technology co-optimization

Speaker: Nadine Collaert, IMEC

Join through zoom: https://lu-se.zoom.us/j/65276229223

Abstract: With Moore?s law under pressure, a rethinking of what the semiconductor industry calls scaling will be needed. While it used to be all about scaling of the transistor, with still major industrial players looking at the next transistor beyond FinFET, these days there is more and more a push toward technology diversification, blending different technologies together to achieve benefits at the system level using System-Technology Co-Optimization (STCO), with 3D technologies taking a central stage.

Today a single CMOS technology often enables all functions in the system (SoC). However, emerging applications like machine learning, 5G, AR/VR... will require a variety of functionalities to be enabled (in memory computation, ultra-low power...) and might require different technologies to achieve this.
In this talk, we will give an overview of imec?s R&D activities in the area of logic, memory, 3D and RF, and the new trends towards enabling this vision of STCO.
 
Speaker CV: Dr. Nadine Collaert is program director at imec. She is currently responsible for the analog/RF program looking at heterogeneous integration of III-V/III-N devices with advanced CMOS to tackle the challenges of next generation mobile communication. Before that she was program director of the LOGIC Beyond Si program focused on the research on novel CMOS devices and new material-enabled device and system approaches to increase functionality. She has been involved in the theory, design, and technology of FinFET devices, emerging memories, transducers for biomedical applications and the integration and characterization of biocompatible materials.

PhD Defence: III-V Nanowires for High-Speed Electronics (Fredrik Lindelöw)

Publicerad: 2020-05-04

Titel: III-V Nanowires for High-Speed Electronics

Author: Fredrik Lindelöw,  Department of Electrical and Information Technology

Faculty opponent: Dr. Nadine Collaert, Belgien

When: 20 May at 9:15

Location:  E:1406, E-building, Ole Römers väg 3, LTH, Lund University / Zoom: https://lu-se.zoom.us/j/66268490344 

Thesis abstract: III-V compound materials have long been used in RF applications in high-electron-mobility-transistors (HEMTs) and bipolar-junction-transistors (BJTs). Now, III-V is also being viewed as a material candidate for replacing silicon in the n-channel in CMOS processes for increased drive currents and reduced power consumption in future nodes. Another alternative to increase the drive current is to use nanowire channels, where the increased electrostatic control can be utilized for scaling the gate length even further. In this thesis, we have characterized III-V nanowires with Hall-measurements to quantify the carrier concentration and optimize growth parameters. We have fabricated nanowire transistors for both digital and analog applications. Digital transistors made of a single nanowire show state-of-the art performance with low subthreshold slope and simultaneously high transconductance and high on-current. For RF applications, the nanowire technology faces several challenges, mainly due to its inherent higher parasitic capacitance since the filling factor is less than 1. To adapt the DC processing scheme to RF measurements, we have implemented T-gates, two-finger devices, 100 nanowires in parallel with tight pitch and we have developed novel spacer schemes with capacitances almost as low as recessed HEMT devices. These schemes consists of for instance modulation doped InP spacers as well as self-aligned air-spacers. To make the RF nanowire MOSFETs even more competitive, the transoncductance of RF devices needs to be optimized to match that of DC devices.

Thesis for download

Master's Thesis Presentation by Alkaysi, Voigt: Autopilot for RescueRunner

Publicerad: 2020-04-28

Speakers:

Advisors:

Examiner

The presentation will be held via zoom, Meeting ID: 683 3351 4426, https://lu-se.zoom.us/u/cdWjqp3GsF.

Licentiate seminar: Security Solutions for Constrained Devices in Cyber-Physical Systems (Martin Gunnarsson)

Publicerad: 2020-03-09

Martin Gunnarsson will present his licentiate thesis "Security Solutions for Constrained Devices in Cyber-Physical Systems"

When: Friday March 27 at 13.15

Preferred attendance: Live on Zoom, https://lu-se.zoom.us/j/164977839

Physical location: E:B, E-building, LTH, John Ericssons väg 2, Lund.

Reviewer: Dr Patrik Ekdahl from Ericsson is the appointed reviewer of the thesis.

Supervisor:  Adj. Prof. Christian Gehrmann at EIT,

Examiner: Prof. Thomas Johansson, EIT. The department will serve cake after the seminar. 

Please note that due to the coronavirus situation, 

the preferred attendance of the event is by Zoom, see above. This requires you to have a computer or smartphone connected to the internet, and you need to download an app (instructions will display when clicking the link). It is possible to ask questions through the app. During the seminar, the Examiner can be reached on phone number0768062407. 

If you still wish to attend the seminar in person, please send a message to christian [dot] gehrmann [at] eit [dot] lth [dot] se. Please be informed that the doors to the E-building are locked, we will be able to let you in through the main entrance (labeled A) from 13.00 until 13.15, but not later. 

Future of Computing: Quantum Technologies

Publicerad: 2020-01-09

SEQUENCE (Sense and Readout Electronics Cryogenically Integrated for QUantum ENhanced Computation and Evolving Communication) is a project funded by the European Union Horizon 2020 Framework Programme with the overall objective: to make use of Unconventional Nanoelectronics to develop cryogenic electronics and demonstrate their usability and effectiveness for quantum computing systems. In connection to the project initialization, the SEQUENCE consortium invites you to a ½ day scientific workshop on the future of quantum technologies for computing. 

When: 23 January 09.00 ? 12.20 (14.00)

Where: Elite Hotel Ideon, Scheelevägen 27, 223 63 Lund Sweden. Room: Giga

Registration: By mail to lars [dot] ohlsson_fhager [at] eit [dot] lth [dot] se no later than 19 January 2020.

Programme

09:00 ? 09:10 Lars-Erik Wernersson - Introduction to SEQUENCE

09:10 ? 09:50 Martin Leijnse (Lund University) - Superconductor-semiconductor hybrid structures for quantum technologies

09:50 ? 10:30 Jonas Bylander (Chalmers) - Superconducting quantum computers - loss, decoherence, and the quantum control system

10:30 ? 11:00 -- Coffee break --

11:00 ? 11:20 Gaël Pillonet (CEA/LETI) - Grenoble Quantum Initiative: from qubits to control electronics on Silicon

11:20 ? 11:40 Arnulf Leuther (Fraunhofer IAF) - HEMT technologies for cryogenic low noise electronics

11:40 ? 12:00 Cezar Zota / Lukas Czornomaz (IBM Research) - Making Quantum Computing Scalable

12:00 ? 12:20 Lars Ohlsson Fhager (Lund University) ? III-V Nanowire MOSFETs for mm-Wave applications

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12:30 ? 14:00 -- lunch (for invited speakers and participants of SEQUENCE) --

Due to limited seats, please sign up by email to lars [dot] ohlsson_fhager [at] eit [dot] lth [dot] se  before 20/1.

Note that SEQUENCE participants do not need to sign up.

Future of Computing: Quantum Technologies