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Pietro Andreani
Universitetslektor, TeknD

Publikationer


Journal Articles

    2013

  1. A. Mazzanti, P. Andreani:
    A Push-Pull Class-C CMOS VCO
    IEEE Journal of Solid-State Circuits, Vol. 48, No. 3, pp. 724-732, 2013. (BibTeX) (More info)
  2. A. Bevilacqua, P. Andreani:
    A 2.7-6.1 GHz CMOS local oscillator based on frequency multiplication by 3/2
    Analog Integrated Circuits and Signal Processing, Vol. 74, No. 1, pp. 11-20, 2013. (BibTeX) (More info)
  3. 2012

  4. A. Bevilacqua, P. Andreani:
    An Analysis of 1/f Noise to Phase Noise Conversion in CMOS Harmonic Oscillators
    IEEE Transactions on Circuits and Systems I: Regular Papers, Vol. 59, No. 5, pp. 938-945, 2012. (BibTeX) (More info)
  5. P. Lu, A. Liscidini, P. Andreani:
    A 3.6mW, 90nm CMOS Gated-Vernier Time-to-Digital Converter with an Equivalent Resolution of 3.2ps
    IEEE Journal of Solid-State Circuits (JSSC), Vol. 47, No. 7, pp. 1626-1635, 2012. (BibTeX) (More info)
  6. M. Corsi, P. Andreani, W. H. Ki, G. Chien, J. Kenney:
    Introduction to the Special Issue on the 2012 IEEE International Solid-State Circuits Conference
    IEEE Journal of Solid-State Circuits, Vol. 47, No. 12, pp. 2859-2864, 2012. (BibTeX) (More info)
  7. D. Radjen, M. Andersson, L. Sundström, P. Andreani:
    A Continuous Time Delta-Sigma Modulator with Reduced Clock Jitter Sensitivity through DSCR Feedback
    Analog Integrated Circuits and Signal Processing, 2012. (BibTeX) (More info)
  8. A. Bevilacqua, P. Andreani:
    Phase Noise Analysis of the Tuned-Input-Tuned-Output (TITO) Oscillator
    IEEE Transactions on Circuits and Systems II: Express Briefs, Vol. 59, No. 1, pp. 20-24, 2012. (BibTeX) (More info)
  9. 2011

  10. P. Andreani, K. Kozmin, P. Sandrup, M. Nilsson, T. Mattsson:
    A TX VCO for WCDMA/EDGE in 90 nm RF CMOS
    IEEE Journal of Solid-State Circuits, Vol. 46, No. 7, pp. 1618-1626, 2011. (BibTeX) (More info)
  11. M. Camponeschi, A. Bevilacqua, P. Andreani:
    Time-variant analysis and design of a power efficient ISM-band quadrature receiver
    Analog Integrated Circuits and Signal Processing, Vol. 67, No. 1, pp. 11-20, 2011. (BibTeX) (More info)
  12. 2009

  13. A. Mazzanti, P. Andreani:
    A time-variant analysis of fundamental 1/f3 phase noise in CMOS parallel LC-tank quadrature oscillators
    IEEE Transactions on Circuits and Systems I: Regular Papers, Vol. 56, No. 10, pp. 2173-2180, 2009. (BibTeX) (More info)
  14. 2008

  15. S. Mattisson, H. Hagberg, P. Andreani:
    Sensitivity degradation in a tri-band GSM BiCMOS direct-conversion receiver caused by transient substrate heating
    IEEE Journal of Solid-State Circuits, Vol. 43, No. 2, pp. 486-496, 2008. (BibTeX) (More info)
  16. L. Lu, Z. Tang, P. Andreani, A. Mazzanti, A. Hajimiri:
    Comments on "Comments on "A General Theory of Phase Noise in Electrical Oscillators""
    IEEE Journal of Solid-State Circuits, Vol. 43, No. 9, pp. 2170-2170, 2008. (BibTeX) (More info)
  17. A. Mazzanti, P. Andreani:
    Class-C Harmonic CMOS VCOs, With a General Result on Phase Noise
    IEEE Journal of Solid-State Circuits, Vol. 43, No. 12, pp. 2716-2729, 2008. (BibTeX) (More info)
  18. A. Mazzanti, E. Sacchi, P. Andreani, F. Svelto:
    Analysis and design of a double-quadrature CMOS VCO for subharmonic mixing at Ka-band
    IEEE Transactions on Microwave Theory and Techniques, Vol. 56, No. 2, pp. 355-363, 2008. (BibTeX) (More info)
  19. 2007

  20. A. Fard, P. Andreani:
    An analysis of 1/f2 phase noise in bipolar colpitts oscillators (With a digression on bipolar differential-pair LC oscillators)
    IEEE Journal of Solid-State Circuits, Vol. 42, No. 2, pp. 374-384, 2007. (BibTeX) (More info)
  21. U. Wismar, D. Wisland, P. Andreani:
    Linearity of bulk-controlled inverter ring VCO in weak and strong inversion
    Analog Integrated Circuits and Signal Processing, Vol. 50, No. 1, pp. 59-67, 2007. (BibTeX) (More info)
  22. L. Vandi, P. Andreani, E. Temporiti, E. Sacchi, I. Bietti, C. Ghezzi, R. Castello:
    A toroidal inductor integrated in a standard CMOS process
    Analog Integrated Circuits and Signal Processing, Vol. 50, No. 1, pp. 39-46, 2007. (BibTeX) (More info)
  23. 2006

  24. P. Andreani:
    A time-variant analysis of the 1/f2 phase noise in CMOS parallel LC-tank quadrature oscillators
    IEEE Transactions on Circuits and Systems I:Regular Papers, Vol. 53, No. 8, pp. 1749-1760, 2006. (BibTeX) (More info)
  25. A. Liscidini, A. Mazzanti, R. Tonietto, L. Vandi, P. Andreani, R. Castello:
    Single-stage low-power quadrature RF receiver front-end: the LMV cell
    IEEE Journal of Solid-State Circuits, Vol. 41, No. 12, pp. 2832-2841, 2006. (BibTeX) (More info)
  26. A. Mazzanti, F. Svelto, P. Andreani:
    On the amplitude and phase errors of quadrature LC-tank CMOS oscillators
    IEEE Journal of Solid-State Circuits, Vol. 41, No. 6, pp. 1305-1313, 2006. (BibTeX) (More info)
  27. P. Andreani, A. Fard:
    More on the 1/f2 Phase Noise Performance of CMOS Differential-Pair LC-Tank Oscillators
    IEEE Journal of Solid-State Circuits, Vol. 41, No. 12, pp. 2703-2712, 2006. (BibTeX) (More info)
  28. P. Andreani, J. R. Long:
    Misconception regarding use of transformer resonators in monolithic oscillators
    IEE Electronics Letters, Vol. 42, No. 7, pp. 387-388, 2006. (BibTeX) (More info)
  29. 2005

  30. P. Rossi, F. Svelto, A. Mazzanti, P. Andreani:
    Reduced impact of induced gate noise on inductively degenerated LNAs in deep submicron CMOS technologies
    Analog Integrated Circuits and Signal Processing, Vol. 42, No. 1, pp. 31-36, 2005. (BibTeX) (More info)
  31. P. Andreani, X. Wang, L. Vandi, A. Fard:
    A study of phase noise in colpitts and LC-tank CMOS oscillators
    IEEE Journal of Solid-State Circuits, Vol. 40, No. 5, pp. 1107-1118, 2005. (BibTeX) (More info)
  32. R. Strandberg, P. Andreani, L. Sundström:
    Spectrum emission considerations for baseband-modeled CALLUM architectures
    IEEE Transactions on Microwave Theory and Techniques, Vol. 53, No. 2, pp. 660-669, 2005. (BibTeX) (More info)
  33. 2004

  34. P. Andreani, X. Wang:
    On the phase-noise and phase-error performances of multiphase LC CMOS VCOs
    IEEE Journal of Solid-State Circuits, Vol. 39, No. 11, pp. 1883-1893, 2004. (BibTeX) (More info)
  35. 2003

  36. L. E. Wernersson, E. Lind, P. Lindström, P. Andreani:
    Highly functional tunnelling devices integrated in 3D
    International Journal of Circuit Theory and Applications, Vol. 31, No. 1, pp. 105-117, 2003. (BibTeX) (More info)
  37. 2002

  38. P. Andreani, H. Sjöland:
    Tail current noise suppression in RF CMOS VCOs
    IEEE Journal of Solid-State Circuits, Vol. 37, No. 3, pp. 342-348, 2002. (BibTeX) (More info)
  39. P. Andreani, A. Bonfanti, L. Romano, C. Samori:
    Analysis and design of a 1.8-GHz CMOS LC quadrature VCO
    IEEE Journal of Solid-State Circuits, Vol. 37, No. 12, pp. 1737-1747, 2002. (BibTeX) (More info)
  40. P. Andreani, S. Mattisson:
    On the use of Nauta's transconductor in low-frequency CMOS g(m)-C bandpass filters
    IEEE Journal of Solid-State Circuits, Vol. 37, No. 2, pp. 114-124, 2002. (BibTeX) (More info)
  41. 2001 and earlier

  42. P. Andreani:
    Very low phase noise RF quadrature oscillator architecture
    Electronics Letters, Vol. 37, No. 5 July, pp. 902-903, 2001. (BibTeX) (More info)
  43. P. Andreani, H. Sjöland:
    Noise optimization of an inductively degenerated CMOS low noise amplifier
    IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, Vol. 48, No. 9, pp. 835-841, 2001. (BibTeX) (More info)
  44. P. Andreani, L. Sundström:
    A chip for linearization of RF power amplifiers using predistortion based on a bit-parallel complex multiplier
    Analog Integrated Circuits and Signal Processing, Vol. 22, No. 1, pp. 25-30, 2000. (BibTeX) (More info)
  45. P. Andreani, S. Mattisson:
    A 2.4-GHz CMOS monolithic VCO with an MOS varactor
    Analog Integrated Circuits and Signal Processing, Vol. 22, No. 1, pp. 17-24, 2000. (BibTeX) (More info)
  46. P. Andreani, S. Mattisson:
    On the use of MOS varactors in RF VCOs
    IEEE Journal of Solid-State Circuits, Vol. 35, No. 6, pp. 905-910, 2000. (BibTeX) (More info)
  47. P. Andreani, S. Mattisson:
    Extension of the Cochrun-Grabel method to allow for mutual inductances
    IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications, Vol. 46, No. 4, pp. 481-483, 1999. (BibTeX) (More info)
  48. P. Andreani, F. Bigongiari, R. Roncella, R. Saletti, P. Terreni:
    A digitally controlled shunt capacitor CMOS delay line
    Analog Integrated Circuits and Signal Processing, Vol. 18, No. 1, pp. 89-96, 1999. (BibTeX) (More info)
  49. P. Andreani, F. Bigongiari, R. Roncella, R. Saletti, P. Terreni, A. Bigongiari, M. Lippi:
    Multihit multichannel time-to-digital converter with ±1% differential nonlinearity and near optimal time resolution
    IEEE Journal of Solid-State Circuits, Vol. 33, No. 4, pp. 650-656, 1998. (BibTeX) (More info)
  50. P. Andreani, S. Mattisson:
    Characteristic polynomial and zero polynomial with the Cochrun-Grabel method
    International Journal of Circuit Theory and Applications, Vol. 26, No. 3, pp. 287-292, 1998. (BibTeX) (More info)
  51. P. Andreani, L. Sundström:
    Chip for wideband digital predistortion RF power amplifier linearisation
    Electronics Letters, Vol. 33, No. 11, pp. 925-926, 1997. (BibTeX) (More info)
  52. V. Öwall, P. Andreani, L. Brange, P. Nilsson, A. Wass, M. Torkelson:
    Custom DSP Design of a GSM Speech Coder
    Journal of VLSI Signal Processing, Vol. 11, No. 3, pp. 213-228, 1995. (BibTeX) (More info)

Conference Papers (Peer reviewed)

    2013

  1. D. Ye, P. Lu, P. Andreani, R. v. d. Zee:
    A Wide Bandwidth Fractional-N Synthesizer for LTE with Phase Noise Cancellation Using a Hybrid- -DAC and Charge Re-timing
    ISCAS, Beijing, China, 2013-05-19. (In press) (BibTeX) (More info)
  2. P. Lu, P. Andreani, A. Liscidini:
    A 2-D GRO Vernier Time-to-Digital Converter with Large Input Range and Small Latency
    IEEE RFIC, Seattle, Washington, USA, 2013-06-02. (In press) (BibTeX) (More info)
  3. 2012

  4. P. Lu, Y. Wu, P. Andreani:
    A 90nm CMOS Digital PLL Based on Vernier-Gated-Ring-Oscillator Time-to-Digital Converter
    ISCAS, Seoul, Korea, pp. 2593-2596, 2012-05-20. (BibTeX) (More info)
  5. L. Sundström, M. Andersson, M. Andersson, P. Andreani:
    Harmonic Rejection Mixer at ADC Input for Complex IF Dual Carrier Receiver Architecture
    IEEE International Symposium on RF Integrated Circuits (RFIC), Montreal, Canada, pp. 265-268, 2012-05-20/2012-05-23. (BibTeX) (More info)
  6. M. Andersson, M. Andersson, L. Sundström, P. Andreani:
    A 7.5 mW 9 MHz CT Delta-Sigma Modulator in 65 nm CMOS with 69 dB SNDR and Reduced Sensitivity to Loop Delay Variations
    IEEE Asian Solid-State Circuits Conference (ASSCC), Kobe, Japan, 2012-11-12/2012-11-14. (BibTeX) (More info)
  7. P. Lu, A. Liscidini, P. Andreani:
    A 90nm CMOS Gated-Ring-Oscillator-Based 2-Dimension Vernier Time-to-Digital Converter
    NORCHIP, Danmark, 2012-11-12. (In press) (BibTeX) (More info)
  8. 2011

  9. P. Lu, P. Andreani, A. Liscidini:
    A 90nm CMOS Gated-Ring-Oscillator-Based Vernier Time-to-Digital Converter with Improved Resolution
    ESSCIRC, Helsinki, Finland, pp. 459-462, 2011-09-16. (BibTeX) (More info)
  10. M. Abdulaziz, M. Shakir, P. Lu, P. Andreani:
    A 2.7GHz divider-less all digital phase-locked loop with 625Hz frequency resolution in 90nm CMOS
    NORCHIP, Lund, Sweden, 14-15 Nov. 2011. (BibTeX) (More info)
  11. Y. Wu, P. Lu, P. Andreani:
    A Digital PLL with a Multi-Delay Coarse-Fine TDC
    Norchip, Lund, Sweden, 2011-11-16. (BibTeX) (More info)
  12. M. Shakir, M. Abdulaziz, P. Lu, P. Andreani:
    A mixed mode design flow for multi GHz ADPLLs
    NORCHIP, LUND, Sweden, 14-15 Nov. 2011. (BibTeX) (More info)
  13. M. Nilsson, S. Mattisson, N. Klemmer, M. Andersson, T. Arnborg, P. Caputa, S. Ek, L. Fan, H. Fredriksson, F. Garrigues, H. Geis, H. Hagberg, J. Hedestig, H. Huang, Y. Kagan, N. Karlsson, H. Kinzel, T. Mattsson, T. Mills, F. Mu, A. Mårtensson, L. Nicklasson, F. Oredsson, U. Ozdemir, F. Park, T. Pettersson, T. Påhlsson, M. Pålsson, S. Ramon, M. Sandgren, P. Sandrup, A. K. Stenman, R. Strandberg, L. Sundström, F. Tillman, T. Tired, S. Uppathil, J. Walukas, E. Westesson, X. Zhang, P. Andreani:
    A 9-band WCDMA/EDGE transceiver supporting HSPA evolution
    IEEE International Solid-State Circuits Conference (ISSCC), San Fransisco, CA, pp. 366-368, 2011-02-20. (BibTeX) (More info)
  14. D. Radjen, M. Andersson, L. Sundström, P. Andreani:
    A continuous time delta sigma modulator with reduced clock jitter through DSCR feedback
    29th Norchip conference, Lund, 2011-11-14/2011-11-15. (BibTeX) (More info)
  15. 2010

  16. M. Andersson, M. Andersson, L. Sundström, P. Andreani:
    Impact of MOS threshold-voltage mismatch in current-steering DACs for CT delta-sigma modulators
    IEEE International Symposium on Circuits and Systems (ISCAS), Paris, pp. 4021-4024, 2010-05-30/2010-06-02. (BibTeX) (More info)
  17. K. Phansathitwong, H. Sjöland, P. Andreani:
    Low power multi-band CMOS receiver front-end
    PRIME 2010, 6th Conference on Ph.D. Research in Microelectronics & Electronics, Berlin, Germany, 2010-07-18/2010-07-21. (BibTeX) (More info)
  18. P. Lu, P. Andreani:
    A High-resolution Vernier Gated-Ring-Oscillator TDC in 90-nm CMOS
    Norchip, Tempere, Finland, 2010-11-16. (BibTeX) (More info)
  19. 2009

  20. J. Citakovic, P. F. Høvesten, G. Rocca, A. van Halteren, P. Rombach, L. J. Stenberg, P. Andreani, E. Bruun:
    A compact CMOS MEMS microphone with 66dB SNR
    IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, Vol. 52, pp. 350-351, 2009-02-08/2009-02-12. (BibTeX) (More info)
  21. M. Camponeschi, A. Bevilacqua, P. Andreani:
    Analysis and design of a low-power single-stage CMOS wireless receiver
    Norchip 2009, Trondheim, Norway, pp. 1-4, 2009-11-16/2009-11-17. (BibTeX) (More info)
  22. 2008

  23. A. Mazzanti, P. Andreani:
    A 1.4mW 4.90-to-5.65GHz Class-C CMOS VCO with an Average FoM of 194.5dBc/Hz
    2008 IEEE International Solid-State Circuits Conference (ISSCC), Digest of Technical Papers, S. Francisco, CA, pp. 474-475, 629, Feb. 4-6, 2008. (BibTeX) (More info)
  24. 2007

  25. E. Ayranci, K. Christensen, P. Andreani:
    45% Power Saving in a 0.25um BiCMOS 10Gb/s 50Ohm-Terminated Packaged Active-Load Laser Driver
    IEEE International Solid-State Circuits Conference, 2007 (ISSCC 2007). Digest of Technical Papers., San Francisco, CA, pp. 552-553, Feb. 11-15, 2007. (BibTeX) (More info)
  26. M. Höyerby, M. Andersen, P. Andreani:
    A 0.35um 50V CMOS sliding-mode control IC for buck converters
    ESSCIRC, 33rd European Solid State Circuits Conference, 2007., Muenchen, Germany, pp. 182-185, Sep. 11-13, 2007. (BibTeX) (More info)
  27. E. Ayranci, K. Christensen, P. Andreani:
    Enhancement of VCO Linearity and Phase Noise by Implementing Frequency Locked Loop
    EUROCON, 2007. The International Conference on "Computer as a Tool", Warsaw, Poland, pp. 2593-2599, Sep. 9-12, 2007. (BibTeX) (More info)
  28. U. Wismar, D. Wisland, P. Andreani:
    A 0.2V, 7.5 uW, 20 kHz Sigma-Delta modulator with 69 dB SNR in 90 nm CMOS
    ESSCIRC, 33rd European Solid State Circuits Conference, 2007, Muenchen, Germany, pp. 206-209, Sep.11-13, 2007. (BibTeX) (More info)
  29. 2006

  30. F. Nyboe, C. Kaya, L. Risbo, P. Andreani:
    A 240W Monolithic Class-D Audio Amplifier Output Stage
    2006 IEEE International Solid-State Circuits Conference (ISSCC), Digest of Technical Papers, S. Francisco, CA, pp. 1346-1355, Feb. 6-9, 2006. (BibTeX) (More info)
  31. C. Jiang, P. Andreani, U. Keil:
    Detailed behavioral modeling of bang-bang phase detectors
    IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2006., Singapore, pp. 716-719, Dec. 4-7, 2006. (BibTeX) (More info)
  32. U. Wismar, D. Wisland, P. Andreani:
    A 0.2V 0.44 uW 20 kHz Analog to Digital Sigma-Delta Modulator with 57 fJ/conversion FoM
    Proceedings of the 32nd European Solid-State Circuits Conference, 2006. ESSCIRC 2006., Montreux, pp. 187-190, Sept. 2006. (BibTeX) (More info)
  33. P. Andreani, A. Fard:
    A 2.3GHz LC-tank CMOS VCO with optimal phase noise performance
    IEEE International Solid-State Circuits Conference, 2006. ISSCC 2006. Digest of Technical Papers., CA, USA, pp. 691-700, Feb. 2-9, 2006. (BibTeX) (More info)
  34. L. Vandi, P. Andreani, T. Tired, S. Mattisson:
    A novel approach to negative feedback in RX front-ends
    24th Norchip Conference, 2006., Linkoping, pp. 231-234, Nov. 2006. (BibTeX) (More info)
  35. A. Liscidini, A. Mazzanti, R. Tonietto, L. Vandi, P. Andreani, R. Castello:
    A 5.4mW GPS CMOS Quadrature Front-End Based on a Single-Stage LNA-Mixer-VCO
    2006 IEEE International Conference Solid-State Circuits (ISSCC), Digest of Technical Papers, S. Francisco, CA, pp. 1892-1893, Feb. 6-9, 2006. (BibTeX) (More info)
  36. F. Borghetti, J. Nielsen, V. Ferragina, P. Malcovati, P. Andreani, A. Baschirotto:
    A Programmable 10b up-to-6MS/s SAR-ADC Featuring Constant-FoM with On-Chip Reference Voltage Buffers
    Proceedings of the 32nd European Solid-State Circuits Conference, 2006. ESSCIRC 2006., Montreux, pp. 500-503, Sept. 2006. (BibTeX) (More info)
  37. S. Dondi, R. Strandberg, M. Nilsson, A. Boni, P. Andreani:
    High-level design flow for all-digital PLLs
    24th Norchip Conference, 2006., Linkoping, pp. 247-250, Nov. 2006. (BibTeX) (More info)
  38. G. De Vita, G. Iannaccone, P. Andreani:
    A 300 nW, 12 ppm/°C Voltage Reference in a Digital 0.35 um CMOS Process
    2006 Symposium on VLSI Circuits, 2006. Digest of Technical Papers., Honolulu, HI, pp. 81-82, 2006. (BibTeX) (More info)
  39. J. Citakovic, L. Stenberg, P. Andreani:
    1/f Noise Characterization in CMOS Transistors in 0.13um Technology
    24th Norchip Conference, 2006., Linkoping, Sweden, pp. 81-84, Nov. 2006. (BibTeX) (More info)
  40. 2005

  41. L. Vandi, P. Andreani, E. Temporiti, E. Sacchi, I. Bietti, C. Ghezzi, R. Castello:
    Toroidal inductors in CMOS processes
    23rd NORCHIP Conference, 2005., pp. 293-296, 21-22 Nov. 2005. (BibTeX) (More info)
  42. J. Citakovic, I. R. Nielsen, J. H. Nielsen, P. Asbeck, P. Andreani:
    A 0.8V, 7uA, rail-to-rail input/output, constant Gm operational amplifier in standard digital 0.18um CMOS
    23rd NORCHIP Conference, 2005., pp. 54-57, 21-22 Nov. 2005. (BibTeX) (More info)
  43. A. Fard, P. Andreani:
    A low-phase-noise wide-band CMOS quadrature VCO for multi-standard RF front-ends
    2005 IEEE Radio Frequency integrated Circuits (RFIC) Symposium, 2005. Digest of Papers., pp. 539-542, 12-14 June 2005. (BibTeX) (More info)
  44. X. Wang, A. Fard, P. Andreani:
    Phase noise analysis and design of a 3-GHz bipolar differential colpitts VCO
    Proceedings of the 31st European Solid-State Circuits Conference, 2005. ESSCIRC 2005., pp. 391-394, 12-16 Sept. 2005. (BibTeX) (More info)
  45. F. Nyboe, L. Risbo, P. Andreani:
    Time domain analysis of open loop distortion in class D amplifier output stages
    27th International AES Conference, Hillerød, Denmark, Vol. paper 4-3, 2-4 Sept. 2005. (BibTeX) (More info)
  46. M. Pate, L. Risbo, P. Andreani, K. Chao:
    Distortion and error reduction in a class D power stage using feedback
    27th International AES Conference, Hillerød, Denmark, Vol. paper 3-3, 2-4 Sept. 2005. (BibTeX) (More info)
  47. F. Nyboe, L. Risbo, P. Andreani:
    Efficient performance simulation of class D amplifier output stages
    23rd NORCHIP Conference, 2005., pp. 32-35, 21-22 Nov. 2005. (BibTeX) (More info)
  48. U. Wismar, D. Wisland, P. Andreani:
    Linearity of bulk-controlled inverter ring VCO in weak and strong inversion
    23rd NORCHIP Conference, 2005., pp. 145-148, 21-22 Nov. 2005. (BibTeX) (More info)
  49. J. Midtgaard, T. Jeppesen, K. T. Christensen, E. Bruun, P. Andreani:
    Fully integrated 1.7GHz, 188dBc/Hz FoM, 0.8V, 320uW LC-tank VCO and frequency divider
    Symposium on VLSI Circuits, 2005. Digest of Technical Papers., pp. 244-247, 16-18 June 2005. (BibTeX) (More info)
  50. J. Nielsen, P. Andreani, P. Malcovati, A. Baschirotto:
    Technology scaling impact on embedded ADC design for telecom receivers
    IEEE International Symposium on Circuits and Systems, 2005 (ISCAS)., Vol. 5, pp. 4614-4617, 2005. (BibTeX) (More info)
  51. T. Rahkonen, P. Andreani:
    Numerical effects in time-domain simulations of electronic circuits - a reminder
    23rd NORCHIP Conference, 2005., pp. 28-31, 21-22 Nov. 2005. (BibTeX) (More info)
  52. F. Nyboe, L. Risbo, P. Andreani:
    Determination of over current protection thresholds for class D audio amplifiers
    23rd NORCHIP Conference, 2005., pp. 125-128, 21-22 Nov. 2005. (BibTeX) (More info)
  53. 2004

  54. U. Wismar, J. Nielsen, P. Andreani:
    Impact of oscillator power in discrete and continuous time Sigma Delta converters
    Proceedings of the Norchip Conference, 2004., pp. 127-130, 8-9 Nov. 2004. (BibTeX) (More info)
  55. X. Wang, P. Andreani:
    Comparison of the image rejection between the passive and the Gilbert mixer
    Proceedings of the 2004 International Symposium on Circuits and Systems, 2004. ISCAS '04., Vol. 1, pp. I - 968-971, 23-26 May 2004. (BibTeX) (More info)
  56. S. Levantino, X. Wang, P. Andreani, C. Samori, A. Lacaita:
    A circuit technique improving the image rejection of RF front-ends
    2004 Symposium on VLSI Circuits, 2004. Digest of Technical Papers., pp. 368-371, 17-19 June 2004. (BibTeX) (More info)
  57. P. Andreani:
    Phase noise analysis of the LC-tank CMOS oscillator
    Proceeding of the NORCHIP Conference, pp. 147-150, 8-9 nov, 2004. (BibTeX) (More info)
  58. R. Strandberg, P. Andreani, L. Sundström:
    Implementation of the signal component generator of a CALLUM 2 transmitter architecture in CMOS technology
    Proceedings of the 22nd Norchip Conference, Oslo, Norway, pp. 183-186, Nov 8-9 2004. (BibTeX) (More info)
  59. X. Wang, P. Andreani:
    A phase noise analysis of CMOS colpitts oscillators
    Proceedings of the Norchip Conference, 2004., pp. 151-154, 8-9 Nov. 2004. (BibTeX) (More info)
  60. X. Wang, P. Andreani:
    Low-phase-error and low-phase-noise 2GHz CMOS quadrature VCOs
    Proceedings of the Norchip Conference, 2004., pp. 155-158, 8-9 Nov. 2004. (BibTeX) (More info)
  61. 2003

  62. X. Wang, P. Andreani:
    Impact of mutual inductance and parasitic capacitance on the phase-error performance of CMOS quadrature VCOs
    Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03., Vol. 1, pp. I-661-I-664, 25-28 May 2003. (BibTeX) (More info)
  63. P. Rossi, F. Svelto, P. Andreani:
    Serendipitous noise reduction in inductively degenerated CMOS RF LNAs
    Proceedings of the 2003 NORCHIP Conference, pp. 24-26, 2003. (BibTeX) (More info)
  64. 2002

  65. B. Shi, W. Shan, P. Andreani:
    A 57-dB image band rejection CMOS GmC polyphase filter with automatic frequency tuning for Bluetooth
    IEEE International Symposium on Circuits and Systems, 2002. ISCAS 2002., Vol. 5, pp. V-169-V-172, 26-29 May 2002. (BibTeX) (More info)
  66. L. E. Wernersson, E. Lind, P. Lindström, P. Andreani:
    Circuits and devices with integrated VFETs and RTDs
    2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353), Phoenix-Scottsdale, AZ, USA, pp. 205-208, 26-29 May 2002. (BibTeX) (More info)
  67. R. Strandberg, P. Andreani, L. Sundström:
    Bandwidth considerations for a CALLUM transmitter architecture
    Proceedings - IEEE International Symposium on Circuits and Systems, Phoenix, AZ, Vol. 4, pp. 25-28, May 26-29 2002. (BibTeX) (More info)
  68. P. Andreani:
    A 2GHz, 17% tuning range quadrature CMOS VCO with high figure-of-merit and 0.6° phase error
    Proceedings of the 28th European Solid-State Circuits Conference, ESSCIRC 2002., pp. 815-818, Sep. 24-26, 2002. (BibTeX) (More info)
  69. P. Andreani:
    A low-phase-noise low-phase-error 1.8 GHz quadrature CMOS VCO
    IEEE International Solid-State Circuits Conference -Digest of Technical Papers, San Francisco, CA, Vol. 1, Feb 3-7 2002. (BibTeX) (More info)
  70. X. Wang, P. Andreani:
    A 2GHz Low-Phase-Noise CMOS quadrature VCO
    Proceedings of the 2002 NORCHIP Conference, pp. 303-308, 2002. (BibTeX) (More info)
  71. 2001 and earlier

  72. P. Andreani:
    A 1.8-GHz monolithic CMOS VCO tuned by an inductive varactor
    The 2001 IEEE International Symposium on Circuits and Systems, 2001. ISCAS 2001., Sydney, NSW, Vol. 4, pp. 714-717, 6-9 May 2001. (BibTeX) (More info)
  73. P. Andreani:
    Phase noise reduction in RF CMOS VCO's via capacitive filtering
    Proceedings of the NORCHIP '01 Conference., pp. 21-27, 2001. (BibTeX) (More info)
  74. P. Andreani, H. Sjöland:
    A 2.2 GHz CMOS VCO with inductive degeneration noise suppression
    Proceedings of the IEEE 2001 Custom Integrated Circuits Conference, San Diego, CA, USA, pp. 197-200, 6-9 May 2001. (BibTeX) (More info)
  75. P. Andreani, H. Sjöland:
    A 1.8 GHz CMOS VCO with reduced phase noise
    2001 Symposium on VLSI Circuits, 2001. Digest of Technical Papers., Kyoto, Japan, pp. 121-122, 14-16 June 2001. (BibTeX) (More info)
  76. P. Andreani, S. Mattisson, B. Essink:
    A CMOS gm-C polyphase filter with high image band rejection
    Proceedings of the 26th European Solid-State Circuits Conference, 2000. ESSCIRC '00., pp. 272-275, 19-21 Sep. 2000. (BibTeX) (More info)
  77. P. Andreani, S. Mattisson:
    A CMOS gm-C IF filter for Bluetooth
    Proceedings of the IEEE 2000 Custom Integrated Circuits Conference, 2000. CICC., Orlando, FL, pp. 391-394, 21-24 May 2000. (BibTeX) (More info)
  78. P. Andreani, S. Mattisson:
    A 1.8-GHz CMOS VCO tuned by an accumulation-mode MOS varactor
    The 2000 IEEE International Symposium on Circuits and Systems, 2000. Proceedings. ISCAS 2000., Geneva, Vol. 1, pp. 315-318, 28-31 May 2000. (BibTeX) (More info)
  79. P. Andreani, S. Mattisson:
    A 100MHz CMOS gm-C bandpass filter
    Proceedings of the 25th European Solid-State Circuits Conference, 1999. ESSCIRC '99., pp. 374-377, 21-23 Sept. 1999. (BibTeX) (More info)
  80. P. Andreani, S. Mattisson:
    A 2.4-GHz CMOS monolithic VCO based on an MOS varactor
    Proceedings of the 1999 IEEE International Symposium on Circuits and Systems, 1999. ISCAS '99., Orlando, FL, Vol. 2, pp. 557-560, 30 May-2 June 1999. (BibTeX) (More info)
  81. P. Andreani, L. Sundström, N. Karlsson, M. Svensson:
    A chip for linearization of RF power amplifiers using digital predistortion with a bit-parallel complex multiplier
    Proceedings of the 1999 IEEE International Symposium on Circuits and Systems, 1999. ISCAS '99., Orlando, FL, Vol. 1, pp. 346-349, 30 May-2 June 1999. (BibTeX) (More info)
  82. J. Piper, P. Andreani:
    A CMOS current amplifier for biological sensors
    In Proceedings of the NORCHIP '98 Conference, pp. 296-301, 1998. (BibTeX) (More info)
  83. P. Andreani:
    A Parasitic Insensitive Transconductance-C Bandpass Filter
    Proc.of the NORCHIP '98 conference., pp. 34-41, 1998. (BibTeX) (More info)
  84. P. Andreani:
    A comparison between two 1.8GHz CMOS VCOs tuned by different varactors
    Proceedings of the 24th European Solid-State Circuits Conference, 1998. ESSCIRC '98., pp. 380-383, 22-24 Sept. 1998. (BibTeX) (More info)
  85. P. Andreani, F. Bigongiari, R. Roncella, R. Saletti, P. Terreni:
    MHITIC: 8-channels, 1-ns, Multihit Time-to-Digital Converter CMOS Integrated Circuit
    Proceedings of ESSCIRC 1996, pp. 76-79, Sept. 1996. (BibTeX) (More info)
  86. V. Öwall, P. Andreani, L. Brange, P. Nilsson, A. Wass, M. Torkelson:
    Custom DSP design of a GSM speech coder
    European Conference on Design Automation, Paris, France, Feb. 22-25, 1993. (BibTeX) (More info)
  87. V. Öwall, P. Andreani, L. Brange, P. Nilsson, A. Wass, M. Torkelson:
    A GSM speech coder implemented on a customized processor architecture
    ISCAS '93, 1993 IEEE International Symposium on Circuits and Systems, IEEE International Symposium on Circuits and Systems (ISCAS), Chicago, USA, pp. 235-238, May 3-6, 1993. (BibTeX) (More info)

Conference Papers

  1. V. Öwall, P. Andreani, L. Brange, P. Nilsson, A. Wass, M. Torkelson:
    Custom DSP implementation of a GSM speech coder
    Radio Science and Communication Conference 1993 (RVK 93), Lund, Sweden, pp. 161-164, April 5-7, 1993. (BibTeX) (More info)

Conference Abstracts

  1. M. Abdulaziz, M. Shakir, P. Lu, P. Andreani:
    A 2.7GHz divider-less all digital phase-locked loop with 625Hz frequency resolution in 90nm CMOS
    GigaHertz Symposium 2012, Frösundavik, Stockholm, Sweden, 2012-03-06/2012-03-07. (BibTeX) (More info)

Dissertations

  1. P. Andreani:
    Reactors - Circuit Theory and Silicon Integrated Applications
    ISSN 1402-8662, P. Andreani, P.O. Box 110, SE-221 00 Lund, Sweden, 1999. (BibTeX) (More info)

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