Supervised Ph.D. Theses:
vanVeelen, M., Considerations on Modeling for Early Detection of Abnormalities in Locally Autonomous Distributed Systems (Rijksuniversiteit Groningen, 2 March 2007) ISBN 90-367-2929-7, 277 pages (also IPA Series 2007-03).
Malki, S., Discrete-Time Cellular Neural Networks Implemented on Field-Programmable Gate-Arrays to Build a Virtual Sensor System, Lic. thesis (Lund University, Lund, 2006) ISBN 91-7167-040-8, 95 pages.
terBrugge, M.H., Morphological Design of Discrete-Time Cellular Neural Networks (Rijksuniversiteit Groningen, November 2005) ISBN 90-367-2394-9, 170 pages.
vanderZwaag, B.J., Using Domain-Specific Basic Functions for the Analysis of Supervised Artificial Neural Networks (Twente University, 17 December 2003) ISBN 90-365-2008-8, 116 pages.
Mallon, W.C., Theory and tools for the design of delay-insensitive communicating processes (Rijksuniversiteit Groningen, 21 January 2000) ISBN 90-367-1180-0, 236 pages (also IPA-series 2000-03).
Venema, R.S., Aspects of an integrated neural prediction system (Rijksuniversiteit Groningen, 2 July 1999) ISBN 90-367-1082-0, 309 pages (also IPA Series 1999-13).
Barakova, E.I., Learning reliability: a study on indecisiveness in sample selection (Rijksuniversiteit Groningen, 23 April 1999) ISBN 90-367-0987-3, 195 pages (also IPA Series 1999-05).
deWaard, W.P., Feedforward network architectures for hand-written word recognition (Rijksuniversiteit Groningen, 9 October 1998) ISBN 90-721-2563-0, 174 pages.
Leenstra, J., Hierarchical Test Development and Design-For-Testability for (A)Aynshcronous Semi-Custom ASICs (Eindhoven University, 20 April 1993) ISBN 90-9005928-9, 199 pages.
Nijhuis, J.A.G., An Engineering Approach to Neural System Design (Nijmegen University, 18 January 1993) ISBN 90-9005499-5, 202 pages.
Jayasinghe, J.A.K.S., A Processor Design Methodology for Hard Real-Time Systems (Twente University, 1991) ISBN 90-9004031-5 (supervised till 1988).
Beune, F.A., Generalizing VLSI Layout Design - A rule-based symbolic layout approach (Twente University, 1990) ISBN 90-90033460-9, 160 pages (supervised till 1988).
Examined external Ph.D. Theses:
- Magnusson, A.K., Evolutionary Optimisation of a Morphological Image Processor for Embedded Systems (Chalmers University, March 2008).
- Petterson, O., Model-free execution monitoring in behaviour-based mobile robotics (Örebro University, October 2004).
- Geske, G., Umsetzung und Analyse der analogen Komponenten eines neuronalen Klassifikator, (Universitaet Rostock, 2003).
- Bazen, A.M., Fingerprint Identification (Twente University, September 2002)
- Alba Pinto, C.A., Storage Constraint Satisfaction for embedded processor compilers, (Eindhoven University, June 2002).
- Rutten, J.W.J.M., Synthesis of Asynchronous Burst-mode Finite-state Machines (Eindhoven University, April 2000).
- Hafner, S., Einsatz von kuenstlichen neuronalen Netzen zur Signalverarbeitung im Kraftfahrzeug am Beispiel spezifischer Motorsteuerungsprobleme (Universitaet Stuttgart, January 1998) ISBN 31-833-4912-4, 158 pages.
- Kruiskamp, W., Analog Design Automation using genetic algorithms and polytopes (Eindhoven University, September 1996).
- Meijer, P.B.L., Neural Network Applications in Device and Subcircuit modeling for circuit simulation (Eindhoven University, May 1996).
- Wiegerinck, W., Stochastic Dynamics of On-line Learning in Neural Networks (Catholic University of Nijmegen, January 1996).
- Annema, A.J., Analysis, Modeling and Implementation of Analog Integrated Neural Networks (Twente University, February 1994).
Lambert Spaanenburg studied Electrical Engineering at Delft University. After a stay at the TNO Defense Laboratories in The Hague to fulfill his military obligations to the Royal Dutch Navy, he went to Twente University as Assistant Professor in the field of Microelectronic Design. The TU Solid-State Group housed a fully-equipped fabrication line for small series, which allowed for the development for innovative MOS and bipolar fabrication processes optimized for the needs of efficient logic design.
In 1981, Spaanenburg was one of the first Europeans to experience the magic of the Mead/Conway VLSI design style. Enthusiastically he introduced this as graduate course. His promotion to Associative Professor was earned with a number of novel system design approaches. As part of the NELSIS project (a combined effort of the Dutch technical universities), he designed with his group the demonstrator chip: at that time the first fully integrated wave digital filter. He also gave temporary technical management to ICD, the company that put NELSIS software on the market.
In the same period, Spaanenburg’s group was involved in the redesign of a 8051 compatible micro-controller for low energy applications. The design and test methodology was patented by Philips and later ensured this company a firm grip on the Boundary Scan standard. In 1998, this patent is still cited in the patent literature as state of the art. To create the peace and quiet to write such approaches down as a long-overdue Ph.D. thesis, he accepted the invitation to spent a sabbatical with the Siemens Central Laboratory in Muenich. In the CAD department of dr. E. Hoerbst he introduced the first concepts of the Open Design Frame.
 (---, Smit, J. and vanderVeen, H. ) A methodology for the fast and testable implementation of state diagram specifications, IEEE-JSSC 20, No.2 (April 1985) pp.548-554.
 (---) Design of a 1-chip IBM-3270 Protocol Handler, Microprocessing and Microprogramming 25 (January 1989) pp.189 - 194.
In the meantime, attention has moved to intelligent CAD systems. At the Institute for Microelectronics Stuttgart, he got the opportunity to establish a department developing hardware and supporting software for intelligent signal processing for automotive applications. Several testable ASICs have been developed using compiler techniques. One of them is the digital neural network chip and board that created the intelligent control of the Mercedes autonomous vehicle. The success of the first real-life experiments on German highways led to a larger in-house research effort involving 120 researchers at three Daimler Laboratories in 1997.
 (Nijhuis, J.A.G., Höfflinger, B., vanSchaik, F.A. and ---) Limits to the fault-tolerance of a feedforward neural network with learning, Digest FTCS'90 (Newcastle, England, June 1990) pp.228-235.
 (Leenstra, J. and ---) Hierarchical Test Program Development for Scan Testable Circuits, Proceedings IEEE International Test Conference ITC'91 (Nashville, USA, October 1991) pp. 375 - 384.
 (Nijhuis, J.A.G., Neußer, S., ---, Heller, J., and Spönnemann, J.) Evaluation of Fuzzy and Neural Vehicle Control, reprint from: Proceedings CompEuro'92 (The Hague, The Netherlands, May 1992) pp. 447 - 452, in: R.J.Marks (Ed.), Fuzzy Logic Technology and Applications, IEEE Technology Update Series (IEEE Press, Piscataway), 1994
 (Neußer, S. Nijhuis, J.A.G., ---, Höfflinger, B., Franke, U., and Fritz, H.) Neurocontrol for lateral vehicle guidance, IEEE Micro 13, No.1 (February 1993) pp. 57 - 66.
In 1993, Spaanenburg moved back to the Netherlands, where he started as full professor the Technical Computing Science profile at Groningen University. Focus of this specialization is on embedded systems and neural networks. Through a separate university company a number of research results have been transferred to existing or start-up companies. An example is the VIPUR license-plate recognition system, that can real-time recognize 92% of the plates without defects and even 98% while allowing for 0.01% false recognitions. In 2000 this company left the university to continue under the new name Dacolian.
 (Diepenhorst, M., Ter Haseborg, H., Nijhuis, J.A.G., and ---) Neural Core Module for Embedded Intelligence, Proceedings ISCAS'98 II (Monterey, USA, June 1998) pp. 462-465.
 (Barakova, E.I., and ---) Windowed Active Sampling for Reliable Neural Learning, Journal of Systems Architecture 44, nr. 8 (Elsevier Scientific Publ., Amsterdam, 1998) pp. 635-650.
 (terBrugge, M.H., Nijhuis, J.A.G., and ---) Transformational DT-CNN design from morphological specifications, IEEE Transactions on Circuits and Systems I 45, nr. 9 (1998) pp. 879-888.
 (terBrugge, M.H., Nijhuis, J.A.G., ---, and Stevens, J.H.) CNN Applications in toll driving, Journal of VLSI Signal Processing 23, nr. 2/3 (1999) pp. 465-477.
 (vanVeelen, M., Nijhuis, J.A.G., and ---) Process fault detection through quantitative analysis of learning in neural networks, Proceedings ProRISC'00 (Veldhoven, November 2000) pp. 557 - 565.
 (---, Ter Haseborg, H.M.G., and Peng, W.) Trimming neural networks for embedded intelligence, Int. Journal of Knowledge-based Intelligent Engineering Systems, Vol. 5, No. 3 (July 2001) pp. 171 - 178.
Coming to Lund, the use of Field-Programmable Gate-Arrays (FPGA) was added in the pursuit of digital realizations of (mostly Cellular) Neural Networks. By exploiting a Network-on-Chip technology, applications in classical image understanding as well as more exploratory topics in robot navigation and biometrics have been demonstrated. The methodology is recently extended for power efficiency and ASIC transformation.
 (Grunditz, C., Walder, M., and ---) Constructing a neural system for surface inspection, Proceedings IJCNN, vol. III (Budapest, July 2004) pp. 1881 - 1886.
 (Malki, S. and ---) On the packet-switched implementation of a discrete-time CNN, Euromicro Symposium on Digital System Design (Rennes, France, August 2004) pp. 234 - 241.
 (Fang, W.H., Johansson, T., and ---) Snow 2.0 IP Core for Trusted Hardware, Proceedings FPL 2005 (Tampere, Finland, August 2005) pp. 281 – 286.
Nowadays, Lambert Spaanenburg has become interested in the design and test of large-scale intelligent embedded systems. During a sabbatical at KPN Research Laboratories he developed some fundamental ideas on on-line software fault-detection using neural modeling techniques, which extends the older hardware test by boundary scan to the software realm. This is a basic ingredient for Self-Healing Networks.