Publikationer

• Conference Papers (Peer reviewed) (5)
• Conference Papers (2)

1. P. Meinerzhagen, O. Andersson, B. Mohammadi, Y. Sherazi, A. Burg, J. Rodrigues:
   A 500 fW/bit 14 fJ/bit-access 4kb Standard-Cell Based Sub-VT Memory in 65nm CMOS
   IEEE, ESSIRC 2012, Bordeaux, France, 2012-09-17/2012-09-21. (BibTeX) (More info)
2. J. Constantin, A. Dogan, O. Andersson, P. Meinerzhagen, J. Rodrigues, D. Atienza, A. Burg:
   TamaRISC-CS: An Ultra-Low-Power Application-Specific Processor for Compressed Sensing
   IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SOC), Santa Cruz, USA, 2012-10-07. (BibTeX) (More info)
3. A. Karlsson, O. Andersson, J. Sparsø, J. Rodrigues:
   IR-Drop Reduction in Sub-VT Circuits by De-synchronization
   IEEE Subthreshold Microelectronics Conference, IEEE-Sub-Vt 2012, Waltham, Massachusetts, USA, 2012-10-09/2012-10-10. (BibTeX) (More info)
4. O. Andersson, Y. Sherazi, J. Rodrigues:
   Impact of switching activity on the energy minimum voltage for 65 nm Sub-VT CMOS
   IEEE, NORCHIP, Lund, Sweden, 2011-11-14/2011-11-15. (BibTeX) (More info)
5. P. Meinerzhagen, O. Andersson, Y. Sherazi, A. Burg, J. Rodrigues:
   Synthesis Strategies for Sub-VT Systems
   IEEE, 20th European Conference on Circuit Theory and Design. ECCTD 2011, Linköping, Sweden, 2011-08-29/2011-08-31. (BibTeX) (More info)

1. O. Andersson, Y. Sherazi, B. Mohammadi, P. Meinerzhagen, A. Burg, J. Rodrigues:
   Integration of Full-Custom Cells in a Standard-Cell Based Flow
   CDNLive! EMEA, Munich, 2012-05-14/2012-05-16. (BibTeX) (More info)
2. O. Andersson, D. Rehman, M. Lopez Picazo, L. Sörnmo, J. Rodrigues:
   Low Power and Area Efficient Implementation of a Real-Time AF Detection Algorithm in 130 nm CMOS
   Swedish System-on-Chip Conference SSoCC 2011, Varberg, Sweden, 2011-05-02. (BibTeX) (More info)