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Electrical and Information Technology

Faculty of Engineering LTH | Lund University

Erik Larsson
Associate Professor, PhD

CV


Research projects

  • Feltoleranta datorsystem
    • Period: 2014
    • Project leader: Erik Larsson
    • Funding agency: Helsingborgs stad
  • BASTION - Board and SoC Test Instrumentation for Ageing and No-Failure- Found
    • Period: 2014-2016
    • Project leader: Erik Larsson
    • Funding agency: Seventh Framework Programme
  • DIAMOND - Integrated Debug for Design and Soft Errors
    • Period: 2010-2012
    • Project leader: Erik Larsson
    • Funding agency: Seventh Framework Programme
  • Fault-tolerant design and optimization for multi-processor
    • Period: 2010-2012
    • Project leader: Erik Larsson
    • Funding agency: Swedish Research Council
  • Property Checking in Distributed Systems
    • Period: 2008-2010
    • Project leader: Erik Larsson
    • Funding agency: Swedish Foundation for Strategic Research (SSF)
  • Design of Self-healing System Chips
    • Period: 2008-2011
    • Project leader: Erik Larsson
    • Funding agency: The Swedish Foundation for International Cooperation in Research and Higher Education (STINT)
  • Scholarship from Ericsson AB
    • Period: 2007
    • Funding agency: Ericsson AB
  • Test Design for Computer Systems with Life-Time Perspective
    • Period: 2005-2010
    • Project leader: Erik Larsson
    • Funding agency: Center for Industrial Information Technology (CENIIT)
  • Scholarship for Post doc
    • Period: 2001-2002
    • Funding agency: Japan Society for the Promotion of Science (JSPS) 

Professional service

Invited talks, keynotes, tutorials

  • Erik Larsson and Martin Keim, Embedded DfT Instrumentation -Design, Access, Retargeting and Case Studies (Embedded tutorial), VLSI Test Symposium (VTS), Berkeley, CA, USA, April 2013
  • Erik Larsson and Konstantin Shibin, Fault management in an IEEE P1687 (IJTAG) environment (Tutorial), IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems, Tallinn, Estonia, April 2012 (PDF).
  • Gunnar Carlsson, Artur Jutman and Erik Larsson, SoC-Level Fault Management based on P1687 IJTAG (Tutorial), DIAMOND tutorial at DATE'11: Handling the challenges of debugging and reliability, Grenoble, France, March 2011.
  • Erik Larsson, Testing advanced electronics systems (Tutorial), IEEE Asia Pacific Conference on Circuits and Systems (APCCAS), Malaysia, December 2010.
  • Erik Larsson, A Distributed Architecture for Checking Global Properties during Post Silicon Debug (Elevator talk), International Test Conference (ITC), Austin, Texas, USA, November 2010.
  • Erik Larsson, Checking distributed properties during post silicon debug (Invited talk), Tallinn Technical University, Tallinn, Estonia, February 2010.
  • Erik Larsson, Throughput and Diagnosis - Co-Maximization (Elevator talk), International Test Conference (ITC), Austin, Texas, USA, November 2009.
  • Erik Larsson, Fault-Tolerant Average Execution Time Optimization for General-Purpose Multi-Processor System-on-Chip (Invited talk), Interuniversity Microelectronics Centre (IMEC), Leuven, Belgium, May 2009.
  • Erik Larsson, Power-Aware SOC Test Planning (Keynote), Workshop on RTL and High Level Testing (WRTLT), Sapporo, Japan, November 2008.
  • Erik Larsson, Improved Scan-Chain Diagnosis (Invited talk), SAAB, Linköping, Sweden, May 2008.
  • Erik Larsson, An X-Tolerant and Diagnostic Friendly Approach to Integrate Abort-on-Fail Test and Test Data Compression in a Multi-site Environment (Invited talk), University of Bologna, Bologna, Italy, May 2008.
  • Erik Larsson, Power-Constrained Test Design for Modular System-on-Chip (Invited talk), Indian Institute of Science, Bangalore, India, January 2008.
  • Erik Larsson, An X-Tolerant and Diagnostic Friendly Approach to Integrate Abort-on-Fail Test and Test Data Compression in a Multi-site Environment (Invited talk), Synopsis, San Jose, CA, USA, October 2007.
  • Erik Larsson, Testing System Chips (Invited talk), NXP Semiconductors - Corporate Innovation & Technology, Eindhoven, The Netherlands, September 2007.
  • Erik Larsson, Testing System Chips (Invited talk), Indian Institute of Science, Bangalore, India, August 2007.
  • Erik Larsson and Krishnendu Chakrabarty (Tutorial), Manufacturing Test Solutions for System-On-Chip Integrated Circuits, VLSI Design and Test Symposium (VDAT), Kolkata, India, August 2007. 
  • Erik Larsson, Testing System Chips (Invited talk), The Chinese University of Hong Kong, Hong Kong, China, January 2007.
  • Erik Larsson, Testing System Chips (Invited talk), Nara Institute of Science and Technology, Nara, Japan, January 2007. 
  • Erik Larsson, Test Preparation and Application for System Chips (Invited talk), Tallinn Technical University, Tallinn, Estonia, September 2006.
  • Erik Larsson, Test Preparation and Application for System Chips (Invited talk), Universität Potsdam, Potsdam, Germany, May 2006.
  • Erik Larsson, Design and Optimization of System-on-Chip Test Solutions (Invited talk), Philips Research, Eindhoven, The Nederlands, October 2003.
  • Erik Larsson, Integrated Test Scheduling and Test Access Mechanism Design for System-on-Chip Designs (Invited talk), Hitachi Central Research Laboratory, Tokyo, Japan, October 2002.

 

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