EIT, Forskning, Vetenskaplig excellens, Mest citerade artiklar

Lunds universitet - Lunds Tekniska Högskola

Institutionen för EIT

Utbildning

Forskning

Kontakt

Referens:

S. Johansson, S. Gorji Ghalamestani, M. Egard, M. Borg, M. Berg, L. E. Wernersson, E. Lind:
High frequency vertical InAs nanowire MOSFETs integrated on Si substrates
physica status solidi (c), 38th International Symposium on Compound Semiconductors (ISCS)/23rd International Conference on Indium Phosphide and Related Materials (IPRM)/Compound Semiconductor Week, Berlin, Germany, Vol. 9, No. 2, pp. 350-353, May 22-26, 2011.

BibTeX

Title:

High frequency vertical InAs nanowire MOSFETs integrated on Si substrates
physica status solidi (c)

Type:

conference paper

Keywords:

high-k, annealing, InAs, high frequency, nanowire, MOSFET

Abstract:

RF and DC characterization of vertical InAs nanowire MOSFET on Si substrates are presented. Nanowire arrays are epitaxially integrated on Si substrates by use of a thin InAs buffer layer. For device fabrication, high-k HfO2 gate dielectric and wrap-gates are used. Post-deposition annealing of the high-k is evaluated by comparing one annealed and one not-annealed sample. The annealed sample show better DC characteristics in terms of transconductance, g(m) = 155 mS/mm, and on-current, I-on = 550 mA/mm. Box plots of on-current, on-resistance and transconductance for all 190-nanowire-array transistors on the annealed sample suggest that the electrical properties of the nanowires are preserved when scaling the nanowire diameter. Finally, high frequency characterisation yields a unity current gain cut-off frequency of f(t) = 9.3 GHz for the annealed sample and f(t) = 2.0 GHz for the not-annealed sample. (C) 2011 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim

Year:

2012

MODS XML

Utskriftsversion

Tillbaka

Senast uppdaterad:
Webbansvarig: Henrik Sjöland
Ansvarig utgivare: Prefekt

Institutionen för Elektro- och informationsteknik, LTH, Box 118, 221 00 Lund. Telefon: 046-222 00 00