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Presented

Automated modelling and optimization of a ratioed logic inverter utilizing nanowire-based transistor

Martin Berg () and Kristofer Jansson ()

Start: 2009-06-08
Presentation: 2009-11-30 00:00:00
Plats:
Finished: 2009-12-17

Abstract

Advisor: Lars-Erik Wernersson (EIT) and Peter Nilsson (EIT)

Examinator: Lars-Erik Wernersson (EIT)

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