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EITF20 Computer Architecture

2012/2013 Ht2



kurslogo Course code: EITF20   Credits: 7.5   Activity term: HT1,
Teacher (lectures):
Anders Ardö, Anders.Ardo(at)eit.lth.se
Assistant (labs): Michal Stala
Course litterature (see the 'Course Material' page):

Lectures: 10 x 2 hours; First lecture Thursday 2012-11-01 in E:B (CHANGED!)

Laborations: 4 x 4 hours; First lab 2012-11-13 or 2012-11-16, E:4115,4116

 

  

 

  Course environment, and dependencies:

Course environment, and depencies:

Course related questions:

How can Gene Amdahl help you decide which enhancement is the best?
Is a larger cache better than higher clock frequency?
What is a superscalar CPU?
What is the difference between a direct mapped cache and a set associative?
How come a TLB is essential to virtual memory efficiency?
What is pipelining?
Is out-of-order execution really possible?
How can the hardware rearrange your program?
Why is pipelinng faster than combinatorics?
Different levels of caches - why?
Snooping on busses?
Is the ARM ISA a RISC?
How much memory bandwidth does a modern CPU need?

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Last updated: 2012-11-09 12:56:05
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